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memory: removed hp buffer heap - #1567
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It is full bank size - aligment is easier.
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Why did it change from 0 to 0xBExxxxxx ?
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Because 0 is not realy a valid adress for a bootloader base.
Since HP heap is deleted and its base was used by bootloader as a stack we had to come up with a different place to store it. Hence the calculation.
abonislawski
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HEAP_BUFFER_SIZE not increased in APL?
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@lgirdwood @xiulipan could you help me pinpoint the issue with quemu here ?i tryed booting up this fw on my boba platform and it works. |
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@xiulipan the qemu APL log is sending the FW ready message so not sure why its failing ? |
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@dabekjakub |
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@dabekjakub UT are failing. |
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@dabekjakub what is the status now ? I have a PR to unify the memory allocation and the PR is linked to your PR. |
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@dabekjakub ping, can you give us an ETA ? |
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@RanderWang @lgirdwood Actualy before this removal can be implemented memory alignment feature (that i just finished working on ) must be made. |
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#1694 Is the PR that has to come first so the DMA buffer will align correctly |
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@dabekjakub can you fix conflicts and then @mengdonglin can schedule someone to test. |
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@lgirdwood @mengdonglin It could use a round of back to back testing , since the buffer pointers were moved (the alignment commit should have fixed that, however, it is good to be sure). |
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SOFCI TEST |
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@jajanusz do You think that the
should stay in buffer.h or should it be platform-specific in memory.h? |
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Merged hp buffer heap with normal buffer heap. Since current buffer heap was actually using hp memory and it served no purpose to have two heaps. Removed extern capabilities and merged other capabiliteis to buffer heap. Currently none of those buffer heaps supports extern. Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Add seeting of alignment for DMA buffer that is required by Hardware configuration. Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Merged hp buffer heap with normal buffer heap.
Since current buffer heap was actualy using hp memory and it served
no purpose to have two heaps.
Removed extern capabilities and merged other capabiliteis to
buffer heap. Currently none of those buffer heaps supports extern.
Signed-off-by: Jakub Dabek jakub.dabek@intel.com