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6 changes: 3 additions & 3 deletions scripts/qemu-check.sh
Original file line number Diff line number Diff line change
Expand Up @@ -59,23 +59,23 @@ do
then
READY_IPC="00 00 00 f0"
SHM_IPC_REG=qemu-bridge-ipc-io
OUTBOX_OFFSET="11000"
OUTBOX_OFFSET="7000"
SHM_MBOX=qemu-bridge-hp-sram-mem
ROM="-r ../sof.git/build_${j}_gcc/src/arch/xtensa/rom-$j.bin"
fi
if [ $j == "skl" ]
then
READY_IPC="00 00 00 f0"
SHM_IPC_REG=qemu-bridge-ipc-io
OUTBOX_OFFSET="11000"
OUTBOX_OFFSET="7000"
SHM_MBOX=qemu-bridge-hp-sram-mem
ROM="-r ../sof.git/build_${j}_gcc/src/arch/xtensa/rom-$j.bin"
fi
if [ $j == "kbl" ]
then
READY_IPC="00 00 00 f0"
SHM_IPC_REG=qemu-bridge-ipc-io
OUTBOX_OFFSET="11000"
OUTBOX_OFFSET="7000"
SHM_MBOX=qemu-bridge-hp-sram-mem
ROM="-r ../sof.git/build_${j}_gcc/src/arch/xtensa/rom-$j.bin"
fi
Expand Down
21 changes: 21 additions & 0 deletions src/audio/host.c
Original file line number Diff line number Diff line change
Expand Up @@ -518,6 +518,23 @@ static void host_buffer_cb(void *data, uint32_t bytes)
} while (hd->split_value);
}

static void realign_buffer(struct host_data *hd)
{
uint32_t buffer_alignment;

dma_get_attribute(hd->dma, DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT,
&buffer_alignment);

if ((uintptr_t)hd->dma_buffer->addr % buffer_alignment) {
hd->dma_buffer->addr =
rbrealloc_align(hd->dma_buffer->addr, RZONE_BUFFER,
SOF_MEM_CAPS_DMA,
hd->dma_buffer->alloc_size,
buffer_alignment);
buffer_init(hd->dma_buffer, hd->dma_buffer->alloc_size);
}
}

/* configure the DMA params and descriptors for host buffer IO */
static int host_params(struct comp_dev *dev)
{
Expand Down Expand Up @@ -548,6 +565,8 @@ static int host_params(struct comp_dev *dev)
hd->dma_buffer = list_first_item(&dev->bsink_list,
struct comp_buffer, source_list);

realign_buffer(hd);

/* set callback on buffer consume */
buffer_set_cb(hd->dma_buffer, &host_buffer_cb, dev,
BUFF_CB_TYPE_CONSUME);
Expand All @@ -570,6 +589,8 @@ static int host_params(struct comp_dev *dev)
hd->dma_buffer = list_first_item(&dev->bsource_list,
struct comp_buffer, sink_list);

realign_buffer(hd);

/* set callback on buffer produce */
buffer_set_cb(hd->dma_buffer, &host_buffer_cb, dev,
BUFF_CB_TYPE_PRODUCE);
Expand Down
3 changes: 3 additions & 0 deletions src/drivers/dw/dma.c
Original file line number Diff line number Diff line change
Expand Up @@ -1079,6 +1079,9 @@ static int dw_dma_get_attribute(struct dma *dma, uint32_t type,
case DMA_ATTR_COPY_ALIGNMENT:
*value = DW_DMA_COPY_ALIGNMENT;
break;
case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT:
*value = PLATFORM_DCACHE_ALIGN;
break;
default:
ret = -EINVAL;
break;
Expand Down
3 changes: 3 additions & 0 deletions src/drivers/generic/dummy-dma.c
Original file line number Diff line number Diff line change
Expand Up @@ -523,6 +523,9 @@ static int dummy_dma_get_attribute(struct dma *dma, uint32_t type,
case DMA_ATTR_COPY_ALIGNMENT:
*value = sizeof(void *);
break;
case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT:
*value = PLATFORM_DCACHE_ALIGN;
break;
default:
return -ENOENT; /* Attribute not found */
}
Expand Down
6 changes: 5 additions & 1 deletion src/drivers/imx/edma.c
Original file line number Diff line number Diff line change
Expand Up @@ -471,10 +471,14 @@ static int edma_get_attribute(struct dma *dma, uint32_t type, uint32_t *value)
* size of the elementary copy).
*/
*value = 4;
return 0;
break;
case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT:
*value = PLATFORM_DCACHE_ALIGN;
break;
default:
return -ENOENT; /* Attribute not found */
}
return 0;
}

static int edma_get_data_size(struct dma_chan_data *channel,
Expand Down
4 changes: 4 additions & 0 deletions src/drivers/intel/cavs/hda-dma.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@
/* DGMBS align value */
#define HDA_DMA_BUFFER_ALIGNMENT 0x20
#define HDA_DMA_COPY_ALIGNMENT 0x20
#define HDA_DMA_BUFFER_ADDRESS_ALIGNMENT 0x80

/*
* DMA Pointer Trace
Expand Down Expand Up @@ -876,6 +877,9 @@ static int hda_dma_get_attribute(struct dma *dma, uint32_t type,
case DMA_ATTR_COPY_ALIGNMENT:
*value = HDA_DMA_COPY_ALIGNMENT;
break;
case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT:
*value = HDA_DMA_BUFFER_ADDRESS_ALIGNMENT;
break;
default:
ret = -EINVAL;
break;
Expand Down
5 changes: 3 additions & 2 deletions src/include/sof/lib/dma.h
Original file line number Diff line number Diff line change
Expand Up @@ -88,8 +88,9 @@ enum dma_irq_cmd {
#define DMA_CORE_INVALID 0xFFFFFFFF

/* DMA attributes */
#define DMA_ATTR_BUFFER_ALIGNMENT 0
#define DMA_ATTR_COPY_ALIGNMENT 1
#define DMA_ATTR_BUFFER_ALIGNMENT 0
#define DMA_ATTR_COPY_ALIGNMENT 1
#define DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT 2

struct dma;

Expand Down
12 changes: 0 additions & 12 deletions src/platform/apollolake/apollolake.x.in
Original file line number Diff line number Diff line change
Expand Up @@ -89,9 +89,6 @@ MEMORY
sof_fw :
org = SOF_FW_BASE,
len = SOF_FW_MAX_SIZE
buffer_hp_heap :
org = HEAP_HP_BUFFER_BASE,
len = HEAP_HP_BUFFER_SIZE
wnd0 :
org = HP_SRAM_WIN0_BASE,
len = HP_SRAM_WIN0_SIZE
Expand Down Expand Up @@ -136,7 +133,6 @@ PHDRS
vector_double_lit_phdr PT_LOAD;
vector_double_text_phdr PT_LOAD;
sof_fw_phdr PT_LOAD;
buffer_hp_heap_phdr PT_LOAD;
wnd0_phdr PT_LOAD;
wnd1_phdr PT_LOAD;
wnd2_phdr PT_LOAD;
Expand Down Expand Up @@ -174,14 +170,6 @@ SECTIONS
_MemoryExceptionVector_text_end = ABSOLUTE(.);
} >vector_memory_text :vector_memory_text_phdr

.buffer_hp_heap (NOLOAD) : ALIGN(8)
{
. = ALIGN (32);
_buffer_hp_heap_start = ABSOLUTE(.);
. = . + HEAP_HP_BUFFER_SIZE;
_buffer_hp_heap_end = ABSOLUTE(.);
} >buffer_hp_heap :buffer_hp_heap_phdr

.wnd0 (NOLOAD) : ALIGN(8)
{
. = ALIGN (32);
Expand Down
20 changes: 6 additions & 14 deletions src/platform/apollolake/include/platform/lib/memory.h
Original file line number Diff line number Diff line change
Expand Up @@ -121,8 +121,6 @@
* +--------------------------------------------------------------------------+
* | Offset | Region | Size |
* +------------------+-------------------------+-----------------------------+
* | HP_SRAM_BASE | DMA | HEAP_HP_BUFFER_SIZE |
* +------------------+-------------------------+-----------------------------+
* | SRAM_SW_REG_BASE | SW Registers W0 | SRAM_SW_REG_SIZE |
* +------------------+-------------------------+-----------------------------+
* | SRAM_OUTBOX_BASE | Outbox W0 | SRAM_MAILBOX_SIZE |
Expand Down Expand Up @@ -164,14 +162,6 @@
#define HP_SRAM_BASE 0xBE000000
#define HP_SRAM_MASK 0xFF000000

/* HP SRAM Heap */
#define HEAP_HP_BUFFER_BASE HP_SRAM_BASE
#define HEAP_HP_BUFFER_SIZE 0xA000

#define HEAP_HP_BUFFER_BLOCK_SIZE 0x180
#define HEAP_HP_BUFFER_COUNT \
(HEAP_HP_BUFFER_SIZE / HEAP_HP_BUFFER_BLOCK_SIZE)

/* HP SRAM windows */

/* window 3 */
Expand Down Expand Up @@ -226,7 +216,7 @@

#define SRAM_ALIAS_OFFSET 0x20000000

#define SRAM_WND_BASE (HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE)
#define SRAM_WND_BASE (HP_SRAM_BASE)

#define HP_SRAM_VECBASE_RESET (HP_SRAM_WIN0_BASE + HP_SRAM_WIN0_SIZE)
#define HP_SRAM_VECBASE_OFFSET 0x0
Expand Down Expand Up @@ -282,7 +272,8 @@
HEAP_RT_COUNT256 * 256 + HEAP_RT_COUNT512 * 512 + \
HEAP_RT_COUNT1024 * 1024)

#define HEAP_BUFFER_SIZE 0x8000
#define HEAP_BUFFER_SIZE 0x10000

#define HEAP_BUFFER_BLOCK_SIZE 0x180
#define HEAP_BUFFER_COUNT (HEAP_BUFFER_SIZE / HEAP_BUFFER_BLOCK_SIZE)

Expand Down Expand Up @@ -377,7 +368,7 @@
#define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */
#define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */
#define PLATFORM_HEAP_RUNTIME 1
#define PLATFORM_HEAP_BUFFER 3
#define PLATFORM_HEAP_BUFFER 2

/* Stack configuration */
#define SOF_LP_STACK_SIZE 0x1000
Expand Down Expand Up @@ -428,7 +419,8 @@
#define IMR_BOOT_LDR_BSS_SIZE 0x10000

/* Temporary stack place for boot_ldr */
#define BOOT_LDR_STACK_BASE HEAP_HP_BUFFER_BASE
#define BOOT_LDR_STACK_BASE (HP_SRAM_BASE + HP_SRAM_SIZE - \
SOF_STACK_TOTAL_SIZE)
#define BOOT_LDR_STACK_SIZE SOF_STACK_TOTAL_SIZE

/** \brief Manifest base address in IMR - used by boot loader copy procedure. */
Expand Down
12 changes: 0 additions & 12 deletions src/platform/cannonlake/cannonlake.x.in
Original file line number Diff line number Diff line change
Expand Up @@ -81,9 +81,6 @@ MEMORY
sof_fw :
org = SOF_FW_BASE,
len = SOF_FW_MAX_SIZE
buffer_hp_heap :
org = HEAP_HP_BUFFER_BASE,
len = HEAP_HP_BUFFER_SIZE
wnd0 :
org = HP_SRAM_WIN0_BASE,
len = HP_SRAM_WIN0_SIZE
Expand Down Expand Up @@ -125,7 +122,6 @@ PHDRS
vector_double_lit_phdr PT_LOAD;
vector_double_text_phdr PT_LOAD;
sof_fw_phdr PT_LOAD;
buffer_hp_heap_phdr PT_LOAD;
wnd0_phdr PT_LOAD;
wnd1_phdr PT_LOAD;
wnd2_phdr PT_LOAD;
Expand Down Expand Up @@ -153,14 +149,6 @@ SECTIONS
_MemoryExceptionVector_text_end = ABSOLUTE(.);
} >vector_memory_text :vector_memory_text_phdr

.buffer_hp_heap (NOLOAD) : ALIGN(8)
{
. = ALIGN (32);
_buffer_hp_heap_start = ABSOLUTE(.);
. = . + HEAP_HP_BUFFER_SIZE;
_buffer_hp_heap_end = ABSOLUTE(.);
} >buffer_hp_heap :buffer_hp_heap_phdr

.wnd0 (NOLOAD) : ALIGN(8)
{
. = ALIGN (32);
Expand Down
21 changes: 5 additions & 16 deletions src/platform/cannonlake/include/platform/lib/memory.h
Original file line number Diff line number Diff line change
Expand Up @@ -143,8 +143,6 @@
* +------------------+-------------------------+-----------------------------+
* | SRAM_TRACE_BASE | Trace Buffer W3 | SRAM_TRACE_SIZE |
* +------------------+-------------------------+-----------------------------+
* | HP_SRAM_BASE | DMA | HEAP_HP_BUFFER_SIZE |
* +------------------+-------------------------+-----------------------------+
* | SOF_FW_START | text | |
* | | data | |
* | | ----------------------- | |
Expand Down Expand Up @@ -220,18 +218,8 @@
#define HP_SRAM_WIN3_BASE SRAM_TRACE_BASE
#define HP_SRAM_WIN3_SIZE SRAM_TRACE_SIZE

#define HEAP_HP_BUFFER_BASE (SRAM_TRACE_BASE + SRAM_TRACE_SIZE)
#if CONFIG_COMP_KPB
#define HEAP_HP_BUFFER_SIZE 0x40000
#else
#define HEAP_HP_BUFFER_SIZE 0x20000
#endif
#define HEAP_HP_BUFFER_BLOCK_SIZE 0x100
#define HEAP_HP_BUFFER_COUNT \
(HEAP_HP_BUFFER_SIZE / HEAP_HP_BUFFER_BLOCK_SIZE)

/* HP SRAM Base */
#define HP_SRAM_VECBASE_RESET (HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE)
#define HP_SRAM_VECBASE_RESET (SRAM_TRACE_BASE + SRAM_TRACE_SIZE)

/* text and data share the same HP L2 SRAM on Cannonlake */
#define SOF_FW_START (HP_SRAM_VECBASE_RESET + 0x400)
Expand Down Expand Up @@ -266,7 +254,7 @@
HEAP_RT_COUNT256 * 256 + HEAP_RT_COUNT512 * 512 + \
HEAP_RT_COUNT1024 * 1024)

#define HEAP_BUFFER_SIZE 0xF000
#define HEAP_BUFFER_SIZE 0x50000
#define HEAP_BUFFER_BLOCK_SIZE 0x180
#define HEAP_BUFFER_COUNT (HEAP_BUFFER_SIZE / HEAP_BUFFER_BLOCK_SIZE)

Expand Down Expand Up @@ -365,7 +353,7 @@
#define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */
#define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */
#define PLATFORM_HEAP_RUNTIME 1
#define PLATFORM_HEAP_BUFFER 3
#define PLATFORM_HEAP_BUFFER 2

/* Stack configuration */
#define SOF_LP_STACK_SIZE 0x1000
Expand Down Expand Up @@ -411,7 +399,8 @@
#define IMR_BOOT_LDR_BSS_SIZE 0x10000

/* Temporary stack place for boot_ldr */
#define BOOT_LDR_STACK_BASE HEAP_HP_BUFFER_BASE
#define BOOT_LDR_STACK_BASE (HP_SRAM_BASE + HP_SRAM_SIZE - \
SOF_STACK_TOTAL_SIZE)
#define BOOT_LDR_STACK_SIZE SOF_STACK_TOTAL_SIZE

#define uncache_to_cache(address) \
Expand Down
12 changes: 0 additions & 12 deletions src/platform/icelake/icelake.x.in
Original file line number Diff line number Diff line change
Expand Up @@ -81,9 +81,6 @@ MEMORY
sof_fw :
org = SOF_FW_BASE,
len = SOF_FW_MAX_SIZE
buffer_hp_heap :
org = HEAP_HP_BUFFER_BASE,
len = HEAP_HP_BUFFER_SIZE
wnd0 :
org = HP_SRAM_WIN0_BASE,
len = HP_SRAM_WIN0_SIZE
Expand Down Expand Up @@ -128,7 +125,6 @@ PHDRS
vector_double_lit_phdr PT_LOAD;
vector_double_text_phdr PT_LOAD;
sof_fw_phdr PT_LOAD;
buffer_hp_heap_phdr PT_LOAD;
wnd0_phdr PT_LOAD;
wnd1_phdr PT_LOAD;
wnd2_phdr PT_LOAD;
Expand Down Expand Up @@ -157,14 +153,6 @@ SECTIONS
_MemoryExceptionVector_text_end = ABSOLUTE(.);
} >vector_memory_text :vector_memory_text_phdr

.buffer_hp_heap (NOLOAD) : ALIGN(8)
{
. = ALIGN (32);
_buffer_hp_heap_start = ABSOLUTE(.);
. = . + HEAP_HP_BUFFER_SIZE;
_buffer_hp_heap_end = ABSOLUTE(.);
} >buffer_hp_heap :buffer_hp_heap_phdr

.wnd0 (NOLOAD) : ALIGN(8)
{
. = ALIGN (32);
Expand Down
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