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dma-trace: free buffer on error - #3562
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We are leaking memory if the host sends bad messages to the firmware since we are not freeing the buffer. Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
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@kv2019i @plbossart fyi - Looks like the driver should handle the -1 traces messages and not report the overflow ? |
I have zero understanding of all this. We've had this issue for MONTHS, and no one has a rational explanation for what happens, and if it's an error. |
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@plbossart The sram reads back 0xffffffff during pm ops when sram is off so this would explain the -1 size and offset. |
That message is printed as a result of an IPC_TRACE_MESSAGE coming from the DSP. Are you saying it's possible that this message is sent and somehow the DSP still turns its SRAM off? That would be an interesting race condition. |
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As both posn->overflow ("4294967295 bytes") and posn->messages ("Total messages -1") are all ones, it indeed seems we are reading IPC payload when the DSP is of and get all-ones values and that gets parsed as a trace message. It's quite an interesting race indeed. SOF_IPC_GLB_TRACE_MSG is 0x9, so odds are very low we are parsing random garbage as a trace IPC. So more likely DSP is sending out a DMA trace just before powering off. Seems like a FW side issue, right @lgirdwood @plbossart ? |
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@kv2019i what if the trace is sent before DSP is shutdown and is just stuck in what ever event queue we have? I dont know what the current state of the control mechanism is, but just a thought that the kernel might not be flushing its inbox before powering off. |
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So the sequence is
So it looks like FW is powering OFF between 1 & 3. The solution is to prevent DSP D3 entry is IPC is pending. @slawblauciak can we add a flag here to wait on IPC completion before FW D3 entry |
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Is the above discussion blocking this PR? This PR is blocking oss-fuzz integration as it crashes the fuzzer very early. |
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@cujomalainey wrote:
I don't think so, agreed we should proceed to merge. Actually, where is this log from #3562 (comment) , @lgirdwood -> we could file a separarte bug just for this?
We should have protections in place for this. This error is printed on host side in middle of IPC RX processing, before host acks the IPC reception (by writing HIPCT_BUSY to doorbell register). And when we power down, host sends explicit CTX_SAVE and disables IRQs, so after this, kernel won't handle any IPC RX. On FW side, ipc_pm_gate() calls trace_off() and there the DMA trace work queue is cancelled. One place that is a bit more complicated to validate is if the call to "schedule_task_cancel(&trace_data->dmat_work);" could stop IPC transaction in the middle (FW is cleaned up before host sets BUSY). |
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@lgirdwood are we ok to merge? |
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@cujomalainey merged. |
We are leaking memory if the host sends bad messages to the firmware
since we are not freeing the buffer.
Signed-off-by: Curtis Malainey cujomalainey@chromium.org