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bootloader: enable LPSRAM memory for cannonlake #1552

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Merged
jajanusz merged 7 commits into from
Jul 30, 2019
Merged

bootloader: enable LPSRAM memory for cannonlake #1552

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cd92c18
shim: add LSPGCTL register relative offset
mrajwa Jun 12, 2019
7cedbb3
Kconfig: add option to enable CONFIG_LP_SRAM
mrajwa Jun 12, 2019
5096db4
bootloader: enable LPSRAM depending on CONFIG
mrajwa Jun 12, 2019
ea10d48
memory: fix LPSRAM defines on CANNONLAKE
mrajwa Jun 12, 2019
c814628
kconfig: enable LPSRAM by default for APL
mrajwa Jul 29, 2019
5e40872
kconfig: enable LPSRAM by default for CNL
mrajwa Jul 29, 2019
09957d2
memory: set LPSRAM related defines to zero if LP not configured
mrajwa Jul 29, 2019
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9 changes: 9 additions & 0 deletions Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,18 @@ config HP_MEMORY_BANKS
config LP_MEMORY_BANKS
int "LP memory banks count"
default 1
depends on LP_SRAM
help
Available memory banks count for Low Power memory

config LP_SRAM
bool "Enable LPSRAM memory"
default n
help
Turn ON/OFF LPSRAM bank/s. This provides an option to enable an LPSRAM
memory for specific platform. Until this options is enabled firmware will
not enable any of LPSRAM memory banks.

endmenu

config HOST_PTABLE
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8 changes: 4 additions & 4 deletions src/arch/xtensa/boot_loader.c
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Expand Up @@ -197,7 +197,7 @@ static uint32_t hp_sram_init(void)

#endif

#if CONFIG_APOLLOLAKE
#if CONFIG_LP_SRAM
static int32_t lp_sram_init(void)
{
uint32_t status;
Expand All @@ -211,8 +211,8 @@ static int32_t lp_sram_init(void)
/* add some delay before writing power registers */
idelay(delay_count);

lspgctl_value = shim_read(LSPGCTL);
shim_write(LSPGCTL, lspgctl_value & !LPSRAM_MASK(0));
lspgctl_value = shim_read(SHIM_LSPGCTL);

@jajanusz jajanusz Jun 13, 2019

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It got a bit messy, we have LSPGCTL once used as shim (here) and another time as just memory mng register to turn it off at all (in asm_memory_management). Please clean it up.

shim_write(SHIM_LSPGCTL, lspgctl_value & !LPSRAM_MASK(0));

/* add some delay before checking the status */
idelay(delay_count);
Expand Down Expand Up @@ -251,7 +251,7 @@ void boot_master_core(void)
return;
}

#if CONFIG_APOLLOLAKE
#if CONFIG_LP_SRAM
/* init the LPSRAM */
platform_trace_point(TRACE_BOOT_LDR_LPSRAM);

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1 change: 1 addition & 0 deletions src/arch/xtensa/configs/apollolake_defconfig
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Expand Up @@ -3,3 +3,4 @@ CONFIG_CAVS_DMIC=y
CONFIG_CAVS_SSP=y
CONFIG_LP_MEMORY_BANKS=2
CONFIG_HP_MEMORY_BANKS=8
CONFIG_LP_SRAM=y
1 change: 1 addition & 0 deletions src/arch/xtensa/configs/cannonlake_defconfig
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Expand Up @@ -4,3 +4,4 @@ CONFIG_CAVS_SSP=y
CONFIG_CORE_COUNT=4
CONFIG_LP_MEMORY_BANKS=1
CONFIG_HP_MEMORY_BANKS=47
CONFIG_LP_SRAM=y
5 changes: 5 additions & 0 deletions src/platform/apollolake/include/platform/lib/memory.h
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Expand Up @@ -366,8 +366,13 @@
#define HEAP_LP_BUFFER_SIZE LP_SRAM_SIZE

#define HEAP_LP_BUFFER_BLOCK_SIZE 0x180

#if CONFIG_LP_MEMORY_BANKS
#define HEAP_LP_BUFFER_COUNT \
(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
#else
#define HEAP_LP_BUFFER_COUNT 0
#endif

#define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */
#define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */
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12 changes: 7 additions & 5 deletions src/platform/cannonlake/include/platform/lib/memory.h
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Expand Up @@ -340,15 +340,17 @@
HEAP_RT_LP_COUNT128 * 128 + HEAP_RT_LP_COUNT256 * 256 + \
HEAP_RT_LP_COUNT512 * 512 + HEAP_RT_LP_COUNT1024 * 1024)

#define HEAP_LP_BUFFER_BASE \
(HEAP_LP_RUNTIME_BASE + HEAP_LP_RUNTIME_SIZE)
#define HEAP_LP_BUFFER_SIZE \
(LP_SRAM_SIZE - HEAP_LP_RUNTIME_SIZE - SOF_LP_STACK_SIZE - \
HEAP_LP_SYSTEM_SIZE)
#define HEAP_LP_BUFFER_BASE LP_SRAM_BASE
#define HEAP_LP_BUFFER_SIZE LP_SRAM_SIZE

#define HEAP_LP_BUFFER_BLOCK_SIZE 0x180

#if CONFIG_LP_MEMORY_BANKS
#define HEAP_LP_BUFFER_COUNT \
(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
#else
#define HEAP_LP_BUFFER_COUNT 0
#endif

#define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */
#define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */
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1 change: 1 addition & 0 deletions src/platform/cannonlake/include/platform/lib/shim.h
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Expand Up @@ -178,6 +178,7 @@

#define SHIM_PWRSTS 0x92
#define SHIM_LPSCTL 0x94
#define SHIM_LSPGCTL 0x50

/** \brief GPDMA shim registers Control */
#define SHIM_GPDMA_BASE_OFFSET 0x6500
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5 changes: 5 additions & 0 deletions src/platform/icelake/include/platform/lib/memory.h
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Expand Up @@ -340,8 +340,13 @@
HEAP_LP_SYSTEM_SIZE)

#define HEAP_LP_BUFFER_BLOCK_SIZE 0x180

#if CONFIG_LP_MEMORY_BANKS
#define HEAP_LP_BUFFER_COUNT \
(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
#else
#define HEAP_LP_BUFFER_COUNT 0
#endif

#define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */
#define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */
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8 changes: 8 additions & 0 deletions src/platform/intel/cavs/include/cavs/lib/memory.h
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Expand Up @@ -19,14 +19,22 @@

#define EBB_SEGMENT_SIZE EBB_BANKS_IN_SEGMENT

#if CONFIG_LP_MEMORY_BANKS
#define PLATFORM_LPSRAM_EBB_COUNT CONFIG_LP_MEMORY_BANKS
#else
#define PLATFORM_LPSRAM_EBB_COUNT 0
#endif

@marc-hb marc-hb Jun 2, 2020

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@mrajwa , the preprocessor replaces undefined macros with 0 so I don't see when or how the newer and more convoluted code behaves differently from the previous code, can you explain? Besides moving any -Wundef warning to the previous line I couldn't find any difference.


#define PLATFORM_HPSRAM_EBB_COUNT CONFIG_HP_MEMORY_BANKS

#define MAX_MEMORY_SEGMENTS PLATFORM_HPSRAM_SEGMENTS

#if CONFIG_LP_MEMORY_BANKS
#define LP_SRAM_SIZE \
(CONFIG_LP_MEMORY_BANKS * SRAM_BANK_SIZE)
#else
#define LP_SRAM_SIZE 0
#endif

#define HP_SRAM_SIZE \
(CONFIG_HP_MEMORY_BANKS * SRAM_BANK_SIZE)
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5 changes: 5 additions & 0 deletions src/platform/suecreek/include/platform/lib/memory.h
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Expand Up @@ -341,8 +341,13 @@
HEAP_LP_SYSTEM_SIZE)

#define HEAP_LP_BUFFER_BLOCK_SIZE 0x180

#if CONFIG_LP_MEMORY_BANKS
#define HEAP_LP_BUFFER_COUNT \
(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
#else
#define HEAP_LP_BUFFER_COUNT 0
#endif


#define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */
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4 changes: 3 additions & 1 deletion test/cmocka/src/lib/alloc/alloc.c
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Expand Up @@ -290,6 +290,7 @@ static void test_lib_rballoc_filling_preceding_heaps(struct test_case *tc)
size_t first_heap_size = HEAP_BUFFER_SIZE - tc->alloc_size * 8;
size_t second_heap_size = HEAP_HP_BUFFER_SIZE - tc->alloc_size;
size_t third_heap_size = 2048;

int *first_mem = rballoc(tc->alloc_zone, SOF_MEM_CAPS_RAM,
first_heap_size);
int *second_mem = rballoc(tc->alloc_zone, SOF_MEM_CAPS_RAM,
Expand All @@ -299,8 +300,9 @@ static void test_lib_rballoc_filling_preceding_heaps(struct test_case *tc)

assert_ptr_equal(first_mem, (unsigned int)&_buffer_heap);
assert_ptr_equal(second_mem, HEAP_HP_BUFFER_BASE);
#if CONFIG_LP_SRAM
assert_ptr_equal(third_mem, HEAP_LP_BUFFER_BASE);

#endif
rfree(first_mem);
rfree(second_mem);
rfree(third_mem);
Expand Down