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ASoC: SOF: Intel: BYT: correct shim register reading - #1489

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Nov 22, 2019
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The shim registers in BYT/CHT/BSW are 64bits based, correct the wrong
32bits used in byt_dump().

Signed-off-by: Keyon Jie yang.jie@linux.intel.com

Comment thread sound/soc/sof/intel/byt.c Resolved
ranj063
ranj063 previously approved these changes Nov 15, 2019
@keyonjie

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@plbossart This is good to merge?

@plbossart

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@plbossart This is good to merge?

no, the fixes tag is wrong

Fixes: 9e42c5c ("ASoC: SOF: Intel: Add BYT, CHT and BSW DSP HW support")

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@plbossart This is good to merge?

no, the fixes tag is wrong

Fixes: 9e42c5c ("ASoC: SOF: Intel: Add BYT, CHT and BSW DSP HW support")

It is already like that?
Fixes: 9e42c5c ("ASoC: SOF: Intel: Add BYT, CHT and BSW DSP HW support")

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@plbossart This is good to merge?

no, the fixes tag is wrong
Fixes: 9e42c5c ("ASoC: SOF: Intel: Add BYT, CHT and BSW DSP HW support")

It is already like that?
Fixes: 9e42c5c ("ASoC: SOF: Intel: Add BYT, CHT and BSW DSP HW support")

I gave you the correct tag last week already.

3a9e204 (Liam Girdwood 2019-09-27 15:05:37 -0500 148) u32 st

@keyonjie

keyonjie commented Nov 21, 2019 •

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I gave you the correct tag last week already.

3a9e204 (Liam Girdwood 2019-09-27 15:05:37 -0500 148) u32 st

Oh shoot, my bad, didn't get your exact point during several ping-pong conservations.

The shim registers in BYT/CHT/BSW are 64bits based, correct the
copy/paste (from bdw.c where the shim registers are 32bits based) error
in byt_dump().

Fixes: 3a9e204 ("ASoC: SOF: Intel: Add context data to any IPC timeout")
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>

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thanks @keyonjie

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plbossart merged commit bc30957 into thesofproject:topic/sof-dev Nov 22, 2019
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3 participants