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Interrupt handler issue after merge? #1540

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@plbossart

Warning on Up-Extreme board, seen only once but still this is concerning since we just reworked all this.

@bardliao @RanderWang @kv2019i @ranj063 FYI

[    3.859688] ------------[ cut here ]------------
[    3.859695] irq 133 handler hda_dsp_interrupt_handler+0x0/0x30 [snd_sof_intel_hda_common] enabled interrupts
[    3.859703] WARNING: CPU: 1 PID: 0 at kernel/irq/handle.c:152 __handle_irq_event_percpu+0x165/0x170
[    3.859703] Modules linked in: snd_soc_dmic wmi_bmof snd_sof_pci snd_sof_intel_hda_common snd_soc_hdac_hda snd_sof_intel_hda snd_sof_intel_byt snd_soc_acpi_intel_match snd_sof_intel_ipc snd_sof snd_sof_xtensa_dsp snd_soc_acpi snd_hda_ext_core snd_soc_core ledtrig_audio x86_pkg_temp_thermal intel_powerclamp snd_hda_intel snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core snd_pcm snd_seq_midi snd_seq_midi_event snd_rawmidi snd_seq snd_seq_device snd_timer wmi snd i915 drm_kms_helper syscopyarea sysfillrect sysimgblt fb_sys_fops drm soundcore processor_thermal_device int340x_thermal_zone intel_soc_dts_iosf mei_me intel_pch_thermal mei efivarfs mmc_block igb i2c_algo_bit sdhci_pci cqhci sdhci intel_lpss_pci xhci_pci intel_lpss xhci_hcd mfd_core
[    3.859725] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.4.0-rc8-test+ #14
[    3.859726] Hardware name: AAEON UP-WHL01/UP-WHL01, BIOS UPW1AM14 10/17/2019
[    3.859728] RIP: 0010:__handle_irq_event_percpu+0x165/0x170
[    3.859730] Code: 37 ff ff ff e9 7b 02 00 00 45 31 ed e9 36 ff ff ff 48 8b 13 44 89 e6 48 c7 c7 48 d0 dc 85 c6 05 50 11 27 01 01 e8 11 da fa ff <0f> 0b eb c3 0f 1f 80 00 00 00 00 41 54 55 48 89 fd 48 83 ec 10 65
[    3.859731] RSP: 0018:ffffabb380110f48 EFLAGS: 00010286
[    3.859732] RAX: 0000000000000000 RBX: ffffa43ae5222180 RCX: 0000000000000006
[    3.859733] RDX: 0000000000000007 RSI: 0000000000000002 RDI: ffffa43ae7b163d0
[    3.859734] RBP: 0000000000000002 R08: 00000000e60e4834 R09: ffffffff8669fd34
[    3.859734] R10: 00000000000002fc R11: 0000000000030294 R12: 0000000000000085
[    3.859735] R13: 0000000000000000 R14: ffffabb380110f8c R15: 0000000000000000
[    3.859736] FS:  0000000000000000(0000) GS:ffffa43ae7b00000(0000) knlGS:0000000000000000
[    3.859737] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[    3.859738] CR2: 00007f5183454421 CR3: 0000000162c46003 CR4: 00000000003606e0
[    3.859739] Call Trace:
[    3.859741]  <IRQ>
[    3.859744]  handle_irq_event_percpu+0x2c/0x80
[    3.859746]  handle_irq_event+0x23/0x43
[    3.859748]  handle_edge_irq+0x79/0x190
[    3.859751]  do_IRQ+0x43/0xd0
[    3.859753]  common_interrupt+0xf/0xf
[    3.859754]  </IRQ>
[    3.859756] RIP: 0010:mwait_idle+0x7b/0x1b0
[    3.859757] Code: 8b 04 25 00 5d 01 00 0f 01 c8 48 8b 00 a8 08 0f 85 38 01 00 00 e9 07 00 00 00 0f 00 2d 60 ba 4a 00 31 c0 48 89 c1 fb 0f 01 c9 <65> 8b 2d de 6b 8b 7a 0f 1f 44 00 00 65 48 8b 04 25 00 5d 01 00 f0
[    3.859758] RSP: 0018:ffffabb3800dbeb8 EFLAGS: 00000246 ORIG_RAX: ffffffffffffffd7
[    3.859759] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 0000000000000000
[    3.859760] RDX: 0000000000000000 RSI: ffffabb3800dbe58 RDI: 00000000e5b2facd
[    3.859761] RBP: 0000000000000001 R08: 0000000000000001 R09: 0000000000000003
[    3.859761] R10: 0000000000000400 R11: 0000000000000208 R12: ffffa43ae6859c00
[    3.859762] R13: 0000000000000000 R14: 0000000000000000 R15: ffffa43ae6859c00
[    3.859765]  do_idle+0x1dd/0x230
[    3.859768]  cpu_startup_entry+0x14/0x20
[    3.859770]  start_secondary+0x152/0x1a0
[    3.859772]  secondary_startup_64+0xa4/0xb0
[    3.859774] ---[ end trace 6003d680d475cce6 ]---

Activity

  1. added
    APLApplies to ApolloLake platform
    bugSomething isn't working
    on Nov 25, 2019
  2. lgirdwood commented on Nov 26, 2019

    @lgirdwood
    Member

    @plbossart Btw, do we have any pointer dereference protection in our handlers. Just thinking a spurious IRQ before components have fully registered or even a race with other events ?

  3. plbossart commented on Nov 26, 2019

    @plbossart
    MemberAuthor

    @plbossart Btw, do we have any pointer dereference protection in our handlers. Just thinking a spurious IRQ before components have fully registered or even a race with other events ?

    no, the handlers are setup first, and the component registration much later (when the card is created).

  4. plbossart commented on Dec 9, 2019

    @plbossart
    MemberAuthor

    I haven't seen this issue since we changed the IPC so closing.

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