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Missing codegen option corresponding to clang's prefer-vector-width #53312
Description
Clang 7 added a codegen option, -mprefer-vector-width=, which allows specifying the preferred vector width for autovectorization. This allows preventing wide vector operations in codegen. Why? Because eagerly using wide vector operations can hurt performance on Intel CPUs in at least two ways:
- Wide vector operations can knock the CPU out of the highest turbo states, reducing the frequency for the next few million cycles;
- Some CPUs implement wide operations by fusing execution ports, so interspersing wider operations with narrower ones can reduce overall throughput.
On the other hand, AVX512 doubles the number of vector registers, so it's useful for performance to enable target_cpu=skylake-avx512, even without using 512-bit operations.
Unfortunately, there doesn't seem to be a way to use this option with rustc: it's not one of the -C codegen options, and passing -C llvm-args=-prefer-vector-width=256 gives
rustc: Unknown command line argument '-prefer-vector-width=256'. Try: 'rustc -help'
rustc: Did you mean '-force-vector-width=256'?
It would be great if rustc had a way to set the preferred vector width.
Reacted by Hanna Kruppe, Joe Richey, Felipe S. S. Schneider and Adam V
Activity
josephlr commentedon Jun 1, 2020
With https://reviews.llvm.org/D67259 now merged as part of LLVM 10 (#67759), there is now the inverse problem, there is no way to tell rustc to prever AVX-512 instructions, even on CPU targets that support it.
As this is a very uncommon use case, a llvm-args would be fine.
josephlr commentedon Jun 1, 2020
So the reason that
llvm-argsdoesn't work is thatprefer-vector-widthin LLVM is a function attribute not a global attribute (whichllvm-argscorrespond to). Clang'sprefer-vector-widthexposes a global flag that just changes the default set of function attributes.Given the fact that:
I think that this issue can be closed
hdevalence commentedon Jun 3, 2020
That sounds fine to me!