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Arm64-SVE: Support scalable SIMD loads, stores, returns, and frame offsets - #135944
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…fsets Covers various gaps and plumbing in codegen/emitter for loads, stores and address computations of SVE vectors and masks. Also disables addressing mode analysis and load/store coalescing for now, to be supported when we can see codegen regressions in asmdiffs.
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This was referenced Oct 29, 2026
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Covers various gaps and plumbing in codegen/emitter for loads, stores and address computations of SVE vectors and masks.
Also disables addressing mode analysis and load/store coalescing for now, to be supported when we can see codegen regressions in asmdiffs.