Versions

• vunit: 4.7.0
• OS: Windows 11
• Simulators tested: Questa, GHDL, NVC

Description

When using VUnit's -m/--minimal flag, design units that are instantiated via component instantiation across different libraries are excluded from the minimal compile set. This causes simulation to fail with unbound component errors.

The root cause is in project.py:_find_component_design_unit_dependencies(), which only searches source_file.library for matching entities/modules. When the design unit is in a different VUnit library than the file instantiating it, the dependency is not found.

Without -m, all files are compiled regardless of dependency analysis, so this works fine.

I bumped into this issue when trying to simulate an Altera IP that uses this component instantiation structure in its generated wrapper. It is a part of a larg-ish project with a lot of design-files and testbenches, so using the -m flag is very useful. This issue might be related to #1073, but the mre doesn't use any IPs.

Minimum reproducable example

The mre has the following structure:

mre/
├── pyproject.toml
├── run.py
├── wrapper.vhd        -> added to lib_a
├── impl_module.vhd    -> added to lib_b
└── tb_wrapper.vhd     -> added to tb_lib

Using uv, run the simulation doing:

uv run run.py -m --clean

The following warning is shown (Questa):

# ** Warning: <path_to_project>\mre\wrapper.vhd(21): (vopt-3473) Component instance "u_impl : impl_module" is not bound.
#         Region: /tb_wrapper/dut

This of course fails the testbench. However, when running without the -m flag, it doesn't fail:

uv run run.py --clean

This has been run on all of the simulators i have access to: Questa, GHDL, NVC. Testing all cases for them i get this test-matrix:

GHDL failing both cases seem to be a simulator-related issue, not with VUnit.