diff --git a/src/audio/dai.c b/src/audio/dai.c index e3784b733ef7..2334c1414e24 100644 --- a/src/audio/dai.c +++ b/src/audio/dai.c @@ -227,6 +227,7 @@ static int dai_playback_params(struct comp_dev *dev, uint32_t period_bytes) config->dest_dev = dai_get_handshake(dd->dai, dev->params.direction, dd->stream_id); config->is_scheduling_source = comp_is_scheduling_source(dev); + config->period = dev->pipeline->ipc_pipe.period; trace_dai_with_ids(dev, "dai_playback_params() " "dest_dev = %d stream_id = %d " @@ -293,6 +294,7 @@ static int dai_capture_params(struct comp_dev *dev, uint32_t period_bytes) config->src_dev = dai_get_handshake(dd->dai, dev->params.direction, dd->stream_id); config->is_scheduling_source = comp_is_scheduling_source(dev); + config->period = dev->pipeline->ipc_pipe.period; /* TODO: Make this code platform-specific or move it driver callback */ if (dai_get_info(dd->dai, DAI_INFO_TYPE) == SOF_DAI_INTEL_DMIC) { diff --git a/src/audio/host.c b/src/audio/host.c index 0e2e46c0a3a4..b67ede29a12d 100644 --- a/src/audio/host.c +++ b/src/audio/host.c @@ -626,6 +626,7 @@ static int host_params(struct comp_dev *dev) config->cyclic = 0; config->irq_disabled = pipeline_is_timer_driven(dev->pipeline); config->is_scheduling_source = comp_is_scheduling_source(dev); + config->period = dev->pipeline->ipc_pipe.period; host_elements_reset(dev); diff --git a/src/audio/pipeline.c b/src/audio/pipeline.c index 062e2a176eff..79ca6ace524d 100644 --- a/src/audio/pipeline.c +++ b/src/audio/pipeline.c @@ -669,7 +669,6 @@ int pipeline_trigger(struct pipeline *p, struct comp_dev *host, int cmd) { struct pipeline_data data; int ret; - uint32_t flags; trace_pipe_with_ids(p, "pipeline_trigger()"); @@ -692,8 +691,6 @@ int pipeline_trigger(struct pipeline *p, struct comp_dev *host, int cmd) data.start = host; data.cmd = cmd; - irq_local_disable(flags); - ret = pipeline_comp_trigger(host, &data, host->params.direction); if (ret < 0) { trace_ipc_error("pipeline_trigger() error: ret = %d, host->" @@ -701,7 +698,6 @@ int pipeline_trigger(struct pipeline *p, struct comp_dev *host, int cmd) cmd); } - irq_local_enable(flags); return ret; } @@ -823,7 +819,7 @@ static int pipeline_copy(struct pipeline *p) start = p->sink_comp; /* if not pipeline preload then copy sink comp first */ - if (!p->preload) { + if (!p->preload && comp_is_active(start)) { ret = comp_copy(start); if (ret < 0) { trace_pipe_error("pipeline_copy() error: " diff --git a/src/drivers/dw/dma.c b/src/drivers/dw/dma.c index 2d085ac1fe9a..540476b93045 100644 --- a/src/drivers/dw/dma.c +++ b/src/drivers/dw/dma.c @@ -462,6 +462,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel, /* default channel config */ channel->direction = config->direction; channel->is_scheduling_source = config->is_scheduling_source; + channel->period = config->period; dw_chan->cfg_lo = DW_CFG_LOW_DEF; dw_chan->cfg_hi = DW_CFG_HIGH_DEF; diff --git a/src/drivers/intel/cavs/hda-dma.c b/src/drivers/intel/cavs/hda-dma.c index 6e4eb015e4f6..d09c42d314cf 100644 --- a/src/drivers/intel/cavs/hda-dma.c +++ b/src/drivers/intel/cavs/hda-dma.c @@ -606,6 +606,7 @@ static int hda_dma_set_config(struct dma_chan_data *channel, channel->direction = config->direction; channel->desc_count = config->elem_array.count; channel->is_scheduling_source = config->is_scheduling_source; + channel->period = config->period; /* validate - HDA only supports continuous elems of same size */ for (i = 0; i < config->elem_array.count; i++) { diff --git a/src/include/sof/lib/dma.h b/src/include/sof/lib/dma.h index c36eb257d17b..128df8baa169 100644 --- a/src/include/sof/lib/dma.h +++ b/src/include/sof/lib/dma.h @@ -127,6 +127,7 @@ struct dma_sg_config { uint32_t src_dev; uint32_t dest_dev; uint32_t cyclic; /* circular buffer */ + uint64_t period; struct dma_sg_elem_array elem_array; /* array of dma_sg elems */ bool scatter; bool irq_disabled; @@ -210,6 +211,7 @@ struct dma_chan_data { uint32_t desc_count; uint32_t index; uint32_t core; + uint64_t period; /* DMA channel's transfer period */ /* true if this DMA channel is the scheduling source */ bool is_scheduling_source; diff --git a/src/include/sof/lib/notifier.h b/src/include/sof/lib/notifier.h index da3ee3a6a507..8301b1ddd46e 100644 --- a/src/include/sof/lib/notifier.h +++ b/src/include/sof/lib/notifier.h @@ -22,6 +22,7 @@ enum notify_id { NOTIFIER_ID_CPU_FREQ = 0, NOTIFIER_ID_SSP_FREQ, NOTIFIER_ID_KPB_CLIENT_EVT, + NOTIFIER_ID_DMA_DOMAIN_CHANGE, }; struct notify { diff --git a/src/include/sof/schedule/ll_schedule_domain.h b/src/include/sof/schedule/ll_schedule_domain.h index dc5e0a43c02a..1c352bf23b6a 100644 --- a/src/include/sof/schedule/ll_schedule_domain.h +++ b/src/include/sof/schedule/ll_schedule_domain.h @@ -131,4 +131,8 @@ struct ll_schedule_domain *dma_multi_chan_domain_init(struct dma *dma_array, uint32_t num_dma, int clk, bool aggregated_irq); +struct ll_schedule_domain *dma_single_chan_domain_init(struct dma *dma_array, + uint32_t num_dma, + int clk); + #endif /* __SOF_SCHEDULE_LL_SCHEDULE_DOMAIN_H__ */ diff --git a/src/platform/intel/cavs/platform.c b/src/platform/intel/cavs/platform.c index d4b6a76f55b9..59aa2e5ce91c 100644 --- a/src/platform/intel/cavs/platform.c +++ b/src/platform/intel/cavs/platform.c @@ -386,13 +386,12 @@ int platform_init(struct sof *sof) PLATFORM_LL_DEFAULT_TIMEOUT); scheduler_init_ll(platform_timer_domain); - /* init low latency multi channel DW-DMA domain and scheduler */ + /* init low latency single channel DW-DMA domain and scheduler */ platform_dma_domain = - dma_multi_chan_domain_init( - &dma[PLATFORM_DW_DMA_INDEX], - PLATFORM_NUM_DW_DMACS, - PLATFORM_DEFAULT_CLOCK, - IS_ENABLED(CONFIG_DW_DMA_AGGREGATED_IRQ)); + dma_single_chan_domain_init + (&dma[PLATFORM_DW_DMA_INDEX], + PLATFORM_NUM_DW_DMACS, + PLATFORM_DEFAULT_CLOCK); scheduler_init_ll(platform_dma_domain); /* init the system agent */ diff --git a/src/schedule/CMakeLists.txt b/src/schedule/CMakeLists.txt index 4ffb0ef2ac56..5726d6586831 100644 --- a/src/schedule/CMakeLists.txt +++ b/src/schedule/CMakeLists.txt @@ -2,6 +2,7 @@ add_local_sources(sof dma_multi_chan_domain.c + dma_single_chan_domain.c edf_schedule.c ll_schedule.c schedule.c diff --git a/src/schedule/dma_single_chan_domain.c b/src/schedule/dma_single_chan_domain.c new file mode 100644 index 000000000000..eae298f5ee3e --- /dev/null +++ b/src/schedule/dma_single_chan_domain.c @@ -0,0 +1,497 @@ +// SPDX-License-Identifier: BSD-3-Clause +// +// Copyright(c) 2019 Intel Corporation. All rights reserved. +// +// Author: Tomasz Lauda + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DMA_DOMAIN_OWNER_INVALID 0xFFFFFFFF + +struct dma_domain_data { + struct notifier notifier; + int irq; + struct dma_chan_data *channel; + void (*handler)(void *arg); + void *arg; +}; + +struct dma_domain { + struct dma *dma_array; /* pointer to scheduling DMAs */ + uint32_t num_dma; /* number of scheduling DMAs */ + uint32_t owner; /* core owning the scheduling channel */ + bool channel_changed; /* true if we needed to re-register */ + + /* data per core */ + struct dma_domain_data data[PLATFORM_CORE_COUNT]; +}; + +struct ll_schedule_domain_ops dma_single_chan_domain_ops; + +static void dma_single_chan_domain_enable(struct ll_schedule_domain *domain, + int core); + +/** + * \brief Retrieves DMA channel with lowest period. + * \param[in,out] dma_domain Pointer to DMA domain. + * \return Pointer to DMA channel. + */ +static struct dma_chan_data *dma_chan_min_period(struct dma_domain *dma_domain) +{ + struct dma *dmas = dma_domain->dma_array; + struct dma_chan_data *channel = NULL; + int i; + int j; + + /* get currently registered channel if exists */ + if (dma_domain->owner != DMA_DOMAIN_OWNER_INVALID && + dma_domain->data[dma_domain->owner].channel) + channel = dma_domain->data[dma_domain->owner].channel; + + for (i = 0; i < dma_domain->num_dma; ++i) { + /* DMA not probed */ + if (!dmas[i].sref) + continue; + + for (j = 0; j < dmas[i].plat_data.channels; ++j) { + /* channel not set as scheduling source */ + if (!dma_is_scheduling_source(&dmas[i].chan[j])) + continue; + + /* channel not running */ + if (dmas[i].chan[j].status != COMP_STATE_ACTIVE) + continue; + + /* bigger period */ + if (channel && + channel->period <= dmas[i].chan[j].period) + continue; + + channel = &dmas[i].chan[j]; + } + } + + return channel; +} + +/** + * \brief Sends notification event about scheduling DMA channel change. + * \param[in,out] channel Pointer to new scheduling DMA channel. + */ +static void dma_domain_notify_change(struct dma_chan_data *channel) +{ + struct notify_data notify_data; + + notify_data.id = NOTIFIER_ID_DMA_DOMAIN_CHANGE; + notify_data.target_core_mask = + NOTIFIER_TARGET_CORE_ALL_MASK & ~BIT(cpu_get_id()); + notify_data.data_size = sizeof(*channel); + notify_data.data = channel; + + notifier_event(¬ify_data); +} + +/** + * \brief Registers and enables selected DMA interrupt. + * \param[in,out] channel Pointer to DMA channel. + * \param[in,out] data Pointer to DMA domain data. + * \param[in,out] handler Pointer to DMA interrupt handler. + * \param[in,out] arg Pointer to DMA interrupt handler's argument. + * \return Error code. + */ +static int dma_single_chan_domain_irq_register(struct dma_chan_data *channel, + struct dma_domain_data *data, + void (*handler)(void *arg), + void *arg) +{ + int irq = dma_chan_irq(channel->dma, channel->index); + int ret; + + data->irq = interrupt_get_irq(irq, dma_irq_name(channel->dma)); + if (data->irq < 0) + return data->irq; + + ret = interrupt_register(data->irq, handler, arg); + if (ret < 0) + return ret; + + interrupt_enable(data->irq, arg); + + interrupt_mask(data->irq, cpu_get_id()); + + data->channel = channel; + data->handler = handler; + data->arg = arg; + + return ret; +} + +/** + * \brief Unregisters and disables selected DMA interrupt. + * \param[in,out] data Pointer to DMA domain data. + */ +static void dma_single_chan_domain_irq_unregister(struct dma_domain_data *data) +{ + interrupt_disable(data->irq, data->arg); + + interrupt_unregister(data->irq, data->arg); +} + +/** + * \brief Registers task to DMA domain. + * \param[in,out] domain Pointer to schedule domain. + * \param[in] period Period of the scheduled task. + * \param[in,out] task Task to be registered. + * \param[in,out] handler Pointer to DMA interrupt handler. + * \param[in,out] arg Pointer to DMA interrupt handler's argument. + * \return Error code. + * + * Every core registers for the same DMA channel, but only the one on which + * this channel is actually running is the owner. If there is already channel + * running we still need to verify, if the recently started channel doesn't + * have lower period. In such case change of channel is needed and all other + * cores need to be notified. + */ +static int dma_single_chan_domain_register(struct ll_schedule_domain *domain, + uint64_t period, struct task *task, + void (*handler)(void *arg), + void *arg) +{ + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + int core = cpu_get_id(); + struct dma_domain_data *data = &dma_domain->data[core]; + struct dma_chan_data *channel; + bool register_needed = true; + int ret; + + /* get running channel with min period */ + channel = dma_chan_min_period(dma_domain); + if (!channel) + return -EINVAL; + + if (data->channel) { + /* channel with min period already registered */ + if (data->channel->period == channel->period) + return 0; + + /* unregister from current channel */ + dma_single_chan_domain_irq_unregister(data); + dma_interrupt(data->channel, DMA_IRQ_MASK); + dma_interrupt(data->channel, DMA_IRQ_CLEAR); + + dma_domain->channel_changed = true; + + /* already registered */ + register_needed = false; + } + + /* register for interrupt */ + ret = dma_single_chan_domain_irq_register(channel, data, handler, arg); + if (ret < 0) + return ret; + + /* enable channel interrupt */ + dma_interrupt(data->channel, DMA_IRQ_UNMASK); + + /* unmask if we are the owner */ + if (dma_domain->owner == core) + interrupt_unmask(data->irq, core); + + /* notify scheduling channel change */ + if (dma_domain->owner != channel->core) + dma_domain_notify_change(channel); + + /* register for source change notifications */ + if (register_needed) + notifier_register(&data->notifier); + + dma_domain->owner = channel->core; + + return ret; +} + +/** + * \brief Checks if any DMA channel is running on current core. + * \param[in,out] dmas Array of possible DMAs. + * \param[in] num Number of DMAs in the array. + * \return True if any DMA channel is running, false otherwise. + */ +static bool dma_chan_is_any_running(struct dma *dmas, uint32_t num) +{ + int core = cpu_get_id(); + int i; + int j; + + for (i = 0; i < num; ++i) { + /* DMA not probed */ + if (!dmas[i].sref) + continue; + + for (j = 0; j < dmas[i].plat_data.channels; ++j) { + /* channel not set as scheduling source */ + if (!dma_is_scheduling_source(&dmas[i].chan[j])) + continue; + + /* channel owned by different core */ + if (core != dmas[i].chan[j].core) + continue; + + if (dmas[i].chan[j].status == COMP_STATE_ACTIVE) + return true; + } + } + + return false; +} + +/** + * \brief Unregisters task from DMA domain if the current core is the owner. + * \param[in,out] domain Pointer to schedule domain. + * \param[in,out] data Pointer to DMA domain data. + * + * If the owner of scheduling DMA channel unregisters, it has to notify + * other cores about the change. + */ +static void dma_domain_unregister_owner(struct ll_schedule_domain *domain, + struct dma_domain_data *data) +{ + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + struct dma *dmas = dma_domain->dma_array; + struct dma_chan_data *channel; + int core = cpu_get_id(); + + /* transfers still scheduled on this channel */ + if (data->channel->status == COMP_STATE_ACTIVE) + return; + + dma_single_chan_domain_irq_unregister(data); + dma_interrupt(data->channel, DMA_IRQ_MASK); + dma_interrupt(data->channel, DMA_IRQ_CLEAR); + data->channel = NULL; + + channel = dma_chan_min_period(dma_domain); + if (!channel) { + dma_domain->owner = DMA_DOMAIN_OWNER_INVALID; + notifier_unregister(&data->notifier); + + return; + } + + /* change owner */ + dma_domain->owner = channel->core; + + /* notify scheduling channel change */ + dma_domain_notify_change(channel); + + /* check if there is another channel running */ + if (dma_chan_is_any_running(dmas, dma_domain->num_dma)) { + /* register again and enable */ + dma_single_chan_domain_irq_register(channel, data, + data->handler, data->arg); + dma_interrupt(data->channel, DMA_IRQ_CLEAR); + dma_single_chan_domain_enable(domain, core); + dma_domain->channel_changed = true; + } +} + +/** + * \brief Unregisters task from DMA domain. + * \param[in,out] domain Pointer to schedule domain. + * \param[in] num_tasks Number of currently scheduled tasks. + */ +static void dma_single_chan_domain_unregister(struct ll_schedule_domain *domain, + uint32_t num_tasks) +{ + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + struct dma *dmas = dma_domain->dma_array; + int core = cpu_get_id(); + struct dma_domain_data *data = &dma_domain->data[core]; + + /* channel not registered */ + if (!data->channel) + return; + + /* unregister domain owner */ + if (dma_domain->owner == core) + return dma_domain_unregister_owner(domain, data); + + /* some channel still running, so return */ + if (dma_chan_is_any_running(dmas, dma_domain->num_dma)) + return; + + /* no more transfers scheduled on this core */ + dma_single_chan_domain_irq_unregister(data); + data->channel = NULL; + + notifier_unregister(&data->notifier); +} + +/** + * \brief Unmasks scheduling DMA channel's interrupt. + * \param[in,out] domain Pointer to schedule domain. + * \param[in] core Core on which interrupt should be unmasked. + */ +static void dma_single_chan_domain_enable(struct ll_schedule_domain *domain, + int core) +{ + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + struct dma_domain_data *data = &dma_domain->data[core]; + + dma_interrupt(data->channel, DMA_IRQ_UNMASK); + + interrupt_unmask(data->irq, core); +} + +/** + * \brief Masks scheduling DMA channel's interrupt. + * \param[in,out] domain Pointer to schedule domain. + * \param[in] core Core on which interrupt should be masked. + */ +static void dma_single_chan_domain_disable(struct ll_schedule_domain *domain, + int core) +{ + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + struct dma_domain_data *data = &dma_domain->data[core]; + + interrupt_mask(data->irq, core); +} + +/** + * \brief Calculates domain's last tick. + * \param[in,out] domain Pointer to schedule domain. + * \param[in] start Offset of last calculated tick. + */ +static void dma_single_chan_domain_set(struct ll_schedule_domain *domain, + uint64_t start) +{ + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + struct dma_domain_data *data = &dma_domain->data[cpu_get_id()]; + uint64_t ticks; + + if (dma_domain->channel_changed) { + domain->last_tick = platform_timer_get(platform_timer); + + dma_domain->channel_changed = false; + } else { + ticks = domain->ticks_per_ms * data->channel->period / 1000 + + start; + + domain->last_tick = domain->last_tick ? ticks : start; + } +} + +/** + * \brief Clears scheduling DMA channel's interrupt. + * \param[in,out] domain Pointer to schedule domain. + */ +static void dma_single_chan_domain_clear(struct ll_schedule_domain *domain) +{ + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + struct dma_domain_data *data = &dma_domain->data[cpu_get_id()]; + + dma_interrupt(data->channel, DMA_IRQ_CLEAR); +} + +/** + * \brief Checks if given task should be executed. + * \param[in,out] domain Pointer to schedule domain. + * \param[in,out] task Task to be checked. + * \return True is task should be executed, false otherwise. + */ +static bool dma_single_chan_domain_is_pending(struct ll_schedule_domain *domain, + struct task *task) +{ + return task->start <= platform_timer_get(platform_timer); +} + +/** + * \brief Scheduling DMA channel change notification handling. + * \param[in] message Id of the notification. + * \param[in,out] data Pointer to notification data. + * \param[in,out] event_data Pointer to notification event data. + */ +static void dma_domain_changed(int message, void *data, void *event_data) +{ + struct ll_schedule_domain *domain = data; + struct dma_domain *dma_domain = ll_sch_domain_get_pdata(domain); + int core = cpu_get_id(); + struct dma_domain_data *domain_data = &dma_domain->data[core]; + + /* unregister from current DMA channel */ + dma_single_chan_domain_irq_unregister(domain_data); + + if (domain_data->channel->core == core) { + dma_interrupt(domain_data->channel, DMA_IRQ_MASK); + dma_interrupt(domain_data->channel, DMA_IRQ_CLEAR); + } + + /* register to the new DMA channel */ + if (dma_single_chan_domain_irq_register(event_data, domain_data, + domain_data->handler, + domain_data->arg) < 0) + return; + + dma_single_chan_domain_enable(domain, core); +} + +/** + * \brief Initializes DMA single channel scheduling domain. + * \param[in,out] dma_array Array of DMAs to be scheduled on. + * \param[in] num_dma Number of DMAs passed as dma_array. + * \param[in] clk Platform clock to base calculations on. + * \return Pointer to initialized scheduling domain object. + */ +struct ll_schedule_domain *dma_single_chan_domain_init(struct dma *dma_array, + uint32_t num_dma, + int clk) +{ + struct ll_schedule_domain *domain; + struct dma_domain *dma_domain; + int i; + + domain = domain_init(SOF_SCHEDULE_LL_DMA, clk, + &dma_single_chan_domain_ops); + + dma_domain = rzalloc(RZONE_SYS | RZONE_FLAG_UNCACHED, SOF_MEM_CAPS_RAM, + sizeof(*dma_domain)); + dma_domain->dma_array = dma_array; + dma_domain->num_dma = num_dma; + dma_domain->owner = DMA_DOMAIN_OWNER_INVALID; + + /* register notifiers */ + for (i = 0; i < PLATFORM_CORE_COUNT; ++i) { + dma_domain->data[i].notifier.cb = dma_domain_changed; + dma_domain->data[i].notifier.cb_data = domain; + dma_domain->data[i].notifier.id = NOTIFIER_ID_DMA_DOMAIN_CHANGE; + } + + ll_sch_domain_set_pdata(domain, dma_domain); + + return domain; +} + +struct ll_schedule_domain_ops dma_single_chan_domain_ops = { + .domain_register = dma_single_chan_domain_register, + .domain_unregister = dma_single_chan_domain_unregister, + .domain_enable = dma_single_chan_domain_enable, + .domain_disable = dma_single_chan_domain_disable, + .domain_set = dma_single_chan_domain_set, + .domain_clear = dma_single_chan_domain_clear, + .domain_is_pending = dma_single_chan_domain_is_pending, +}; diff --git a/src/schedule/ll_schedule.c b/src/schedule/ll_schedule.c index 20530606d03c..3938beda2440 100644 --- a/src/schedule/ll_schedule.c +++ b/src/schedule/ll_schedule.c @@ -115,9 +115,6 @@ static void schedule_ll_clients_enable(struct ll_schedule_data *sch) static void schedule_ll_clients_reschedule(struct ll_schedule_data *sch) { - /* clear domain */ - domain_clear(sch->domain); - /* rearm only if there is work to do */ if (atomic_read(&sch->domain->total_num_tasks)) { domain_set(sch->domain, sch->domain->last_tick); @@ -128,12 +125,22 @@ static void schedule_ll_clients_reschedule(struct ll_schedule_data *sch) static void schedule_ll_tasks_run(void *data) { struct ll_schedule_data *sch = data; + uint32_t num_clients; uint32_t flags; domain_disable(sch->domain, cpu_get_id()); irq_local_disable(flags); + spin_lock(sch->domain->lock); + + /* clear domain only if all clients are done */ + num_clients = atomic_sub(&sch->domain->num_clients, 1); + if (!num_clients) + domain_clear(sch->domain); + + spin_unlock(sch->domain->lock); + /* run tasks if there are any pending */ if (schedule_ll_is_pending(sch)) schedule_ll_tasks_execute(sch); @@ -141,7 +148,7 @@ static void schedule_ll_tasks_run(void *data) spin_lock(sch->domain->lock); /* reschedule only if all clients are done */ - if (!atomic_sub(&sch->domain->num_clients, 1)) + if (!num_clients) schedule_ll_clients_reschedule(sch); spin_unlock(sch->domain->lock); @@ -192,8 +199,10 @@ static void schedule_ll_domain_clear(struct ll_schedule_data *sch) sch->domain->registered[cpu_get_id()] = false; /* reschedule if there is no more clients waiting */ - if (!atomic_sub(&sch->domain->num_clients, 1)) + if (!atomic_sub(&sch->domain->num_clients, 1)) { + domain_clear(sch->domain); schedule_ll_clients_reschedule(sch); + } } spin_unlock(sch->domain->lock); diff --git a/tools/topology/m4/pipeline.m4 b/tools/topology/m4/pipeline.m4 index 1bf4228877a4..37c5ca8d80ad 100644 --- a/tools/topology/m4/pipeline.m4 +++ b/tools/topology/m4/pipeline.m4 @@ -4,6 +4,9 @@ divert(-1) define(`SCHEDULE_TIME_DOMAIN_DMA', 0) define(`SCHEDULE_TIME_DOMAIN_TIMER', 1) +# default number of DAI periods +define(`DAI_DEFAULT_PERIODS', 2) + dnl Define macro for pipeline widget dnl Pipeline name) @@ -53,7 +56,9 @@ define(`PIPELINE_PCM_ADD', `undefine(`PCM_MAX_RATE')' `undefine(`PIPELINE_RATE')' `undefine(`SCHEDULE_TIME_DOMAIN')' +`undefine(`DAI_FORMAT')' `undefine(`SCHED_COMP')' +`undefine(`DAI_PERIODS')' `define(`PIPELINE_ID', $2)' `define(`PCM_ID', $3)' `define(`PIPELINE_CHANNELS', $4)' @@ -67,6 +72,7 @@ define(`PIPELINE_PCM_ADD', `define(`SCHEDULE_TIME_DOMAIN', $12)' `define(`DAI_FORMAT', $5)' `define(`SCHED_COMP', $13)' +`define(`DAI_PERIODS', DAI_DEFAULT_PERIODS)' `include($1)' `DEBUG_PCM_ADD($1, $3)' ,`fatal_error(`Invalid parameters ($#) to PIPELINE_PCM_ADD')')' diff --git a/tools/topology/platform/intel/intel-generic-dmic.m4 b/tools/topology/platform/intel/intel-generic-dmic.m4 index 56b758c82fd8..2d79d1ae2b73 100644 --- a/tools/topology/platform/intel/intel-generic-dmic.m4 +++ b/tools/topology/platform/intel/intel-generic-dmic.m4 @@ -12,25 +12,26 @@ define(DMIC_DAI_LINK_16k_ID, `7') # Define the pipelines # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline using max channels defined by CHANNELS. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-eq-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-eq-capture.m4, DMIC_PIPELINE_48k_ID, DMIC_DAI_LINK_48k_ID, CHANNELS, s32le, - 1000, 0, 0, 48000, 48000, 48000) + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # Passthrough capture pipeline using max channels defined by CHANNELS. # Schedule with 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-eq-capture-16khz.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-eq-capture-16khz.m4, DMIC_PIPELINE_16k_ID, DMIC_DAI_LINK_16k_ID, CHANNELS, s32le, - 1000, 0, 0, 16000, 16000, 16000) + 1000, 0, 0, DMIC, 1, s32le, 3, 16000, 16000, 16000) # # DAIs configuration @@ -39,20 +40,20 @@ PIPELINE_PCM_ADD(sof/pipe-eq-capture-16khz.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, DMIC_PIPELINE_48k_ID, DMIC, 0, dmic01, - concat(`PIPELINE_SINK_', DMIC_PIPELINE_48k_ID), 2, s32le, + concat(`PIPELINE_SINK_', DMIC_PIPELINE_48k_ID), 3, s32le, 1000, 0, 0, 48000, 48000, 48000) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s32le format, with 16 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, DMIC_PIPELINE_16k_ID, DMIC, 1, dmic16k, - concat(`PIPELINE_SINK_', DMIC_PIPELINE_16k_ID), 2, s32le, + concat(`PIPELINE_SINK_', DMIC_PIPELINE_16k_ID), 3, s32le, 1000, 0, 0, 16000, 16000, 16000) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-apl-da7219.m4 b/tools/topology/sof-apl-da7219.m4 index 287375387ef6..35fcb7e9a3b3 100644 --- a/tools/topology/sof-apl-da7219.m4 +++ b/tools/topology/sof-apl-da7219.m4 @@ -29,35 +29,47 @@ include(`platform/intel/dmic.m4') # PCM7 ----> volume (pipe 7) -----> iDisp3 (HDMI/DP playback, BE link 5) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 2, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 3 on PCM 1 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 3, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 4 on PCM 99 using max 4 channels of s32le. # 1000us deadline on core 0 with priority 0 -#PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 4, 99, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 # PIPELINE_PCM_ADD(sof/pipe-passthrough-playback.m4, @@ -86,32 +98,37 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, # DAIs configuration # -# playback DAI is SSP5 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP5 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s16le, + PIPELINE_SOURCE_1, 3, s16le, 1000, 0, 0) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 2, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_2, 2, s16le, + PIPELINE_SOURCE_2, 3, s16le, 1000, 0, 0) -# capture DAI is SSP1 using 2 periods +# capture DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, SSP, 1, SSP1-Codec, - PIPELINE_SINK_3, 2, s16le, + PIPELINE_SINK_3, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC0 using 2 periods +# capture DAI is DMIC0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, DMIC, 0, dmic01, - PIPELINE_SINK_4, 2, s32le, + PIPELINE_SINK_4, 3, s32le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-apl-demux-pcm512x.m4 b/tools/topology/sof-apl-demux-pcm512x.m4 index 079935cdcf0c..eb28dcb48d52 100644 --- a/tools/topology/sof-apl-demux-pcm512x.m4 +++ b/tools/topology/sof-apl-demux-pcm512x.m4 @@ -29,18 +29,26 @@ DEBUG_START # PCM4 <---- demux # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Demux pipeline 1 on PCM 0 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-demux-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-demux-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -69,17 +77,17 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP5 using 2 periods +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # currently this dai is here as "virtual" capture backend -W_DAI_IN(SSP, 5, SSP5-Codec, s24le, 2, 0, 0) +W_DAI_IN(SSP, 5, SSP5-Codec, s24le, 3, 0) # Capture pipeline 5 from demux on PCM 5 using max 2 channels of s32le. PIPELINE_PCM_ADD(sof/pipe-passthrough-capture-sched.m4, diff --git a/tools/topology/sof-apl-dmic-a2ch-b2ch.m4 b/tools/topology/sof-apl-dmic-a2ch-b2ch.m4 index 00aa310c3b41..5247d7b28c73 100644 --- a/tools/topology/sof-apl-dmic-a2ch-b2ch.m4 +++ b/tools/topology/sof-apl-dmic-a2ch-b2ch.m4 @@ -28,24 +28,25 @@ include(`platform/intel/dmic.m4') # PCM7 <----- DMIC7 (DMIC16k) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 6 on PCM 6 using max channels 2. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 6, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 7 on PCM 7 using max channels 2. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture-16khz.m4, 7, 7, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s32le, 3, 16000, 16000, 16000) # @@ -55,20 +56,20 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, DMIC, 0, NoCodec-6, - PIPELINE_SINK_6, 2, s32le, + PIPELINE_SINK_6, 3, s32le, 1000, 0, 0) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 7, DMIC, 1, NoCodec-7, - PIPELINE_SINK_7, 2, s32le, + PIPELINE_SINK_7, 3, s32le, 1000, 0, 0) diff --git a/tools/topology/sof-apl-dmic-a2ch-b4ch.m4 b/tools/topology/sof-apl-dmic-a2ch-b4ch.m4 index 5a3ecf6ec050..88ef8a4c7a05 100644 --- a/tools/topology/sof-apl-dmic-a2ch-b4ch.m4 +++ b/tools/topology/sof-apl-dmic-a2ch-b4ch.m4 @@ -28,24 +28,25 @@ include(`platform/intel/dmic.m4') # PCM7 <----- DMIC7 (DMIC16k) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 6 on PCM 6 using max channels 2 # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 6, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s16le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 7 on PCM 7 using max channels 4. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture-16khz.m4, 7, 7, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s32le, 3, 16000, 16000, 16000) # @@ -55,20 +56,20 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, DMIC, 0, NoCodec-6, - PIPELINE_SINK_6, 2, s16le, + PIPELINE_SINK_6, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 7, DMIC, 1, NoCodec-7, - PIPELINE_SINK_7, 2, s32le, + PIPELINE_SINK_7, 3, s32le, 1000, 0, 0) diff --git a/tools/topology/sof-apl-dmic-a2ch.m4 b/tools/topology/sof-apl-dmic-a2ch.m4 index 548454555f23..e019eefd2eeb 100644 --- a/tools/topology/sof-apl-dmic-a2ch.m4 +++ b/tools/topology/sof-apl-dmic-a2ch.m4 @@ -27,17 +27,18 @@ include(`platform/intel/dmic.m4') # PCM6 <----- DMIC6 (DMIC01) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 6 on PCM 6 using max channels 2. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 6, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # @@ -47,13 +48,13 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, DMIC, 0, NoCodec-6, - PIPELINE_SINK_6, 2, s32le, + PIPELINE_SINK_6, 3, s32le, 1000, 0, 0) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-apl-dmic-a4ch-b2ch.m4 b/tools/topology/sof-apl-dmic-a4ch-b2ch.m4 index f07c73d2f1ec..a3dd8540ca65 100644 --- a/tools/topology/sof-apl-dmic-a4ch-b2ch.m4 +++ b/tools/topology/sof-apl-dmic-a4ch-b2ch.m4 @@ -28,24 +28,25 @@ include(`platform/intel/dmic.m4') # PCM7 <----- DMIC7 (DMIC16k) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 6 on PCM 6 using max channels 4. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 6, 4, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s16le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 7 on PCM 7 using max channels 2. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture-16khz.m4, 7, 7, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s16le, 3, 16000, 16000, 16000) # @@ -55,20 +56,20 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, DMIC, 0, NoCodec-6, - PIPELINE_SINK_6, 2, s16le, + PIPELINE_SINK_6, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 7, DMIC, 1, NoCodec-7, - PIPELINE_SINK_7, 2, s16le, + PIPELINE_SINK_7, 3, s16le, 1000, 0, 0) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-apl-dmic-b2ch.m4 b/tools/topology/sof-apl-dmic-b2ch.m4 index 3d6ccb9c2489..e6198bf5c05b 100644 --- a/tools/topology/sof-apl-dmic-b2ch.m4 +++ b/tools/topology/sof-apl-dmic-b2ch.m4 @@ -27,17 +27,18 @@ include(`platform/intel/dmic.m4') # PCM7 <----- DMIC7 (DMIC16k) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 7 on PCM 7 using max channels 2. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture-16khz.m4, 7, 7, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s32le, 3, 16000, 16000, 16000) # @@ -47,13 +48,13 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 7, DMIC, 1, NoCodec-7, - PIPELINE_SINK_7, 2, s32le, + PIPELINE_SINK_7, 3, s32le, 1000, 0, 0) diff --git a/tools/topology/sof-apl-dmic.m4 b/tools/topology/sof-apl-dmic.m4 index 3c19f4945d8f..5b142c8602c0 100644 --- a/tools/topology/sof-apl-dmic.m4 +++ b/tools/topology/sof-apl-dmic.m4 @@ -27,24 +27,25 @@ define(DMIC_PDM_CONFIG, ifelse(CHANNELS, `4', ``FOUR_CH_PDM0_PDM1'', # PCM7 <----- DMIC7 (DMIC16k) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 6 on PCM 6 using max channels defined by CHANNELS. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 6, CHANNELS, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 7 on PCM 7 using max channels defined by CHANNELS. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 7, 7, CHANNELS, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s16le, 3, 16000, 16000, 16000) # @@ -54,20 +55,20 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, DMIC, 0, NoCodec-6, - PIPELINE_SINK_6, 2, s32le, + PIPELINE_SINK_6, 3, s32le, 1000, 0, 0) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 7, DMIC, 1, NoCodec-7, - PIPELINE_SINK_7, 2, s16le, + PIPELINE_SINK_7, 3, s16le, 1000, 0, 0) diff --git a/tools/topology/sof-apl-eq-dmic.m4 b/tools/topology/sof-apl-eq-dmic.m4 index 976d882b73ae..69eea9efad2a 100644 --- a/tools/topology/sof-apl-eq-dmic.m4 +++ b/tools/topology/sof-apl-eq-dmic.m4 @@ -23,17 +23,18 @@ include(`platform/intel/dmic.m4') # PCM6 <---- EQ IIR <----- DMIC6 (DMIC01) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 13 on PCM 6 using max 4 channels. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-eq-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-eq-capture.m4, 1, 6, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # @@ -43,14 +44,14 @@ PIPELINE_PCM_ADD(sof/pipe-eq-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 1, DMIC, 0, NoCodec-6, - PIPELINE_SINK_1, 2, s32le, + PIPELINE_SINK_1, 3, s32le, 1000, 0, 0) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-apl-eq-pcm512x.m4 b/tools/topology/sof-apl-eq-pcm512x.m4 index 39310e30ef69..d5a0843b3846 100644 --- a/tools/topology/sof-apl-eq-pcm512x.m4 +++ b/tools/topology/sof-apl-eq-pcm512x.m4 @@ -23,22 +23,34 @@ include(`platform/intel/bxt.m4') # PCM0 ----> EQ IIR ----> EQ FIR ----> volume ----> SSP5 (pcm512x) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-eq-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-eq-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 48000, 48000, 48000) # # DAIs configuration # -# playback DAI is SSP5 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # PCM Low Latency, id 0 diff --git a/tools/topology/sof-apl-keyword-detect.m4 b/tools/topology/sof-apl-keyword-detect.m4 index 473fca553450..8ec51f5e8fc9 100644 --- a/tools/topology/sof-apl-keyword-detect.m4 +++ b/tools/topology/sof-apl-keyword-detect.m4 @@ -27,17 +27,18 @@ define(KWD_PIPE_SCH_DEADLINE_US, 20000) # | # Keyword <-----+ -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 1 on PCM 0 using max 2 channels. # Schedule 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-kfbm-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-kfbm-capture.m4, 1, 0, 2, s16le, - KWD_PIPE_SCH_DEADLINE_US, 0, 0, + KWD_PIPE_SCH_DEADLINE_US, 0, 0, DMIC, 1, s16le, 3, 16000, 16000, 16000) # @@ -47,14 +48,14 @@ PIPELINE_PCM_ADD(sof/pipe-kfbm-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s16le format, with 320 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 1, DMIC, 1, NoCodec-6, - PIPELINE_SINK_1, 2, s16le, + PIPELINE_SINK_1, 3, s16le, KWD_PIPE_SCH_DEADLINE_US, 0, 0) diff --git a/tools/topology/sof-apl-nocodec.m4 b/tools/topology/sof-apl-nocodec.m4 index 14e8691c2a5b..bcfd339c9a8f 100644 --- a/tools/topology/sof-apl-nocodec.m4 +++ b/tools/topology/sof-apl-nocodec.m4 @@ -26,7 +26,7 @@ include(`platform/intel/dmic.m4') # Define the pipelines # # PCM0 <---> volume <----> SSP0 -# PCM1 <---> Volume <----> SSP1 +# PCM1 <---> volume <----> SSP1 # PCM2 <---> volume <----> SSP2 # PCM3 <---> volume <----> SSP3 # PCM4 <---> volume <----> SSP4 @@ -34,97 +34,102 @@ include(`platform/intel/dmic.m4') # PCM6 <---- volume <----- DMIC6 (DMIC01) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s16le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-low-latency-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 0, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 0, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 3 on PCM 1 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 3, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 4 on PCM 1 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 4, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 5 on PCM 2 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -#PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +#PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, # 5, 2, 2, s32le, -# 48, 1000, 0, 0) +# 1000, 0, 0, SSP, 2, s16le, 3, +# 48000, 48000, 48000) # Low Latency capture pipeline 6 on PCM 2 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -#PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +#PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, # 6, 2, 2, s32le, -# 48, 1000, 0, 0) +# 1000, 0, 0, SSP, 2, s16le, 3, +# 48000, 48000, 48000) # Low Latency playback pipeline 7 on PCM 3 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 7, 3, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 3, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 8 on PCM 3 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 8, 3, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 3, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 9 on PCM 4 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -#PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +#PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, # 9, 4, 2, s32le, -# 48, 1000, 0, 0) +# 1000, 0, 0, SSP, 4, s16le, 3, +# 48000, 48000, 48000) # Low Latency capture pipeline 10 on PCM 4 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -#PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +#PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, # 10, 4, 2, s32le, -# 48, 1000, 0, 0) +# 1000, 0, 0, SSP, 4, s16le, 3, +# 48000, 48000, 48000) # Low Latency playback pipeline 11 on PCM 5 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 11, 5, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 12 on PCM 5 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 12, 5, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s16le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 13 on PCM 6 using max 2 channels. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 13, 6, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # @@ -134,13 +139,13 @@ PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP0 using 2 periods +# playback DAI is SSP0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 0, NoCodec-0, - PIPELINE_SOURCE_1, 2, s16le, + PIPELINE_SOURCE_1, 3, s16le, 1000, 0, 0) # Media playback pipeline 14 on PCM 7 using max 2 channels of s16le. @@ -161,88 +166,88 @@ SectionGraph."media-pipeline" { ] } -# capture DAI is SSP0 using 2 periods +# capture DAI is SSP0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP, 0, NoCodec-0, - PIPELINE_SINK_2, 2, s16le, + PIPELINE_SINK_2, 3, s16le, 1000, 0, 0) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 3, SSP, 1, NoCodec-1, - PIPELINE_SOURCE_3, 2, s16le, + PIPELINE_SOURCE_3, 3, s16le, 1000, 0, 0) -# capture DAI is SSP1 using 2 periods +# capture DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, SSP, 1, NoCodec-1, - PIPELINE_SINK_4, 2, s16le, + PIPELINE_SINK_4, 3, s16le, 1000, 0, 0) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 #DAI_ADD(sof/pipe-dai-playback.m4, # 5, SSP, 2, NoCodec-2, -# PIPELINE_SOURCE_5, 2, s16le, +# PIPELINE_SOURCE_5, 3, s16le, # 1000, 0, 0) -# capture DAI is SSP2 using 2 periods +# capture DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 #DAI_ADD(sof/pipe-dai-capture.m4, # 6, SSP, 2, NoCodec-2, -# PIPELINE_SINK_6, 2, s16le, +# PIPELINE_SINK_6, 3, s16le, # 1000, 0, 0) -# playback DAI is SSP3 using 2 periods +# playback DAI is SSP3 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 7, SSP, 3, NoCodec-3, - PIPELINE_SOURCE_7, 2, s16le, + PIPELINE_SOURCE_7, 3, s16le, 1000, 0, 0) -# capture DAI is SSP3 using 2 periods +# capture DAI is SSP3 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 8, SSP, 3, NoCodec-3, - PIPELINE_SINK_8, 2, s16le, + PIPELINE_SINK_8, 3, s16le, 1000, 0, 0) -# playback DAI is SSP4 using 2 periods +# playback DAI is SSP4 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 #DAI_ADD(sof/pipe-dai-playback.m4, # 9, SSP, 4, NoCodec-4, -# PIPELINE_SOURCE_9, 2, s16le, +# PIPELINE_SOURCE_9, 3, s16le, # 1000, 0, 0) -# capture DAI is SSP4 using 2 periods +# capture DAI is SSP4 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 #DAI_ADD(sof/pipe-dai-capture.m4, # 10, SSP, 4, NoCodec-4, -# PIPELINE_SINK_10, 2, s16le, +# PIPELINE_SINK_10, 3, s16le, # 1000, 0, 0) -# playback DAI is SSP5 using 2 periods +# playback DAI is SSP5 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 11, SSP, 5, NoCodec-5, - PIPELINE_SOURCE_11, 2, s16le, + PIPELINE_SOURCE_11, 3, s16le, 1000, 0, 0) -# capture DAI is SSP5 using 2 periods +# capture DAI is SSP5 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 12, SSP, 5, NoCodec-5, - PIPELINE_SINK_12, 2, s16le, + PIPELINE_SINK_12, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 13, DMIC, 0, NoCodec-6, - PIPELINE_SINK_13, 2, s32le, + PIPELINE_SINK_13, 3, s32le, 1000, 0, 0) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-apl-pcm512x-nohdmi.m4 b/tools/topology/sof-apl-pcm512x-nohdmi.m4 index 797bdfb40633..fc3aec631ca2 100644 --- a/tools/topology/sof-apl-pcm512x-nohdmi.m4 +++ b/tools/topology/sof-apl-pcm512x-nohdmi.m4 @@ -25,17 +25,18 @@ DEBUG_START # PCM0 ----> volume -----> SSP5 (pcm512x) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 48000, 48000, 48000) # @@ -45,13 +46,13 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP5 using 2 periods +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # PCM Low Latency, id 0 diff --git a/tools/topology/sof-apl-pcm512x.m4 b/tools/topology/sof-apl-pcm512x.m4 index e7b11578b73d..2f516be523a3 100644 --- a/tools/topology/sof-apl-pcm512x.m4 +++ b/tools/topology/sof-apl-pcm512x.m4 @@ -28,19 +28,26 @@ DEBUG_START # PCM3 ----> volume -----> iDisp3 # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-low-latency-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -69,13 +76,13 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP5 using 2 periods +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # Media playback pipeline 5 on PCM 4 using max 2 channels of s16le. diff --git a/tools/topology/sof-apl-rt298.m4 b/tools/topology/sof-apl-rt298.m4 index 2826d54b6f15..95e2587e6b94 100644 --- a/tools/topology/sof-apl-rt298.m4 +++ b/tools/topology/sof-apl-rt298.m4 @@ -22,17 +22,30 @@ include(`platform/intel/bxt.m4') # # PCM0 ----> volume -----> SSP5 (rt298) # PCM5 ----> volume (pipe 5) -----> iDisp1 (HDMI/DP playback, BE link 3) -# PCM6 ----> Volume (pipe 6) -----> iDisp2 (HDMI/DP playback, BE link 4) +# PCM6 ----> volume (pipe 6) -----> iDisp2 (HDMI/DP playback, BE link 4) # PCM7 ----> volume (pipe 7) -----> iDisp3 (HDMI/DP playback, BE link 5) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -57,11 +70,16 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, # DAIs configuration # -# playback DAI is SSP5 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-apl-src-50khz-pcm512x.m4 b/tools/topology/sof-apl-src-50khz-pcm512x.m4 index c04c6eac54a8..4fc851353389 100644 --- a/tools/topology/sof-apl-src-50khz-pcm512x.m4 +++ b/tools/topology/sof-apl-src-50khz-pcm512x.m4 @@ -26,17 +26,18 @@ DEBUG_START # PCM0 ----> src -----> SSP5 (pcm512x) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Playback pipeline 1 on PCM 0 using max 2 channels of s24le. # Schedule 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-src-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-src-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 48000, 50000, 50000) # @@ -46,13 +47,13 @@ PIPELINE_PCM_ADD(sof/pipe-src-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP5 using 2 periods +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # PCM, id 0 diff --git a/tools/topology/sof-apl-src-pcm512x.m4 b/tools/topology/sof-apl-src-pcm512x.m4 index e588808cf33c..9a202da1d1fd 100644 --- a/tools/topology/sof-apl-src-pcm512x.m4 +++ b/tools/topology/sof-apl-src-pcm512x.m4 @@ -26,17 +26,18 @@ DEBUG_START # PCM0 ----> src -----> SSP5 (pcm512x) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Playback pipeline 1 on PCM 0 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-src-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-src-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 8000, 96000, 48000) # @@ -46,13 +47,13 @@ PIPELINE_PCM_ADD(sof/pipe-src-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP5 using 2 periods +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # PCM, id 0 diff --git a/tools/topology/sof-apl-tdf8532.m4 b/tools/topology/sof-apl-tdf8532.m4 index 3e215c32e9dd..8db4732d50a4 100644 --- a/tools/topology/sof-apl-tdf8532.m4 +++ b/tools/topology/sof-apl-tdf8532.m4 @@ -28,45 +28,52 @@ include(`platform/intel/bxt.m4') # PCM5 <----> Volume <----> SSP5(TestPin out/in) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 4 channels of s32le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 4, s32le, - 1000, 0, 0, SSP, 4, s32le, 2, + 1000, 0, 0, SSP, 4, s32le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 2 on PCM 1 using max 8 channels of s32le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 2, 1, 8, s32le, - 1000, 0, 0, SSP, 2, s32le, 2, + 1000, 0, 0, SSP, 2, s32le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 3 on PCM 1 using max 8 channels of s32le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 3, 1, 8, s32le, - 1000, 0, 0, SSP, 2, s32le, 2, 48000, 48000, 48000) + 1000, 0, 0, SSP, 2, s32le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 4, 2, 2, s16le, - 1000, 0, 0, SSP, 0, s16le, 2, + 1000, 0, 0, SSP, 0, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 5 on PCM 2 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 5, 2, 2, s16le, - 1000, 0, 0, SSP, 0, s16le, 2, + 1000, 0, 0, SSP, 0, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 6 on PCM 3 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 3, 2, s16le, - 1000, 0, 0, SSP, 1, s16le, 2, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 7 on PCM 4 using max 2 channels of s16le. @@ -80,21 +87,21 @@ PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 8, 4, 2, s16le, - 1000, 0, 0, SSP, 3, s16le, 2, + 1000, 0, 0, SSP, 3, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 9 on PCM 5 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 9, 5, 2, s16le, - 1000, 0, 0, SSP, 5, s16le, 2, + 1000, 0, 0, SSP, 5, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 10 on PCM 5 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 10, 5, 2, s16le, - 1000, 0, 0, SSP, 5, s16le, 2, + 1000, 0, 0, SSP, 5, s16le, 3, 48000, 48000, 48000) @@ -102,74 +109,79 @@ PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, # DAIs configuration # -# playback DAI is SSP0 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 4, SSP, 0, SSP0-Codec, - PIPELINE_SOURCE_4, 2, s16le, + PIPELINE_SOURCE_4, 3, s16le, 1000, 0, 0) -# capture DAI is SSP0 using 2 periods +# capture DAI is SSP0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 5, SSP, 0, SSP0-Codec, - PIPELINE_SINK_5, 2, s16le, + PIPELINE_SINK_5, 3, s16le, 1000, 0, 0) -# capture DAI is SSP1 using 2 periods +# capture DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, SSP, 1, SSP1-Codec, - PIPELINE_SINK_6, 2, s16le, + PIPELINE_SINK_6, 3, s16le, 1000, 0, 0) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 2, SSP, 2, SSP2-Codec, - PIPELINE_SOURCE_2, 2, s32le, + PIPELINE_SOURCE_2, 3, s32le, 1000, 0, 0) -# capture DAI is SSP2 using 2 periods +# capture DAI is SSP2 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, SSP, 2, SSP2-Codec, - PIPELINE_SINK_3, 2, s32le, + PIPELINE_SINK_3, 3, s32le, 1000, 0, 0) -# playback DAI is SSP3 using 2 periods +# playback DAI is SSP3 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 7, SSP, 3, SSP3-Codec, - PIPELINE_SOURCE_7, 2, s16le, + PIPELINE_SOURCE_7, 3, s16le, 1000, 0, 0) -# capture DAI is SSP3 using 2 periods +# capture DAI is SSP3 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 8, SSP, 3, SSP3-Codec, - PIPELINE_SINK_8, 2, s16le, + PIPELINE_SINK_8, 3, s16le, 1000, 0, 0) -# playback DAI is SSP4 using 2 periods +# playback DAI is SSP4 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 4, SSP4-Codec, - PIPELINE_SOURCE_1, 2, s32le, + PIPELINE_SOURCE_1, 3, s32le, 1000, 0, 0) -# playback DAI is SSP5 using 2 periods +# playback DAI is SSP5 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 9, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_9, 2, s16le, + PIPELINE_SOURCE_9, 3, s16le, 1000, 0, 0) -# capture DAI is SSP5 using 2 periods +# capture DAI is SSP5 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 10, SSP, 5, SSP5-Codec, - PIPELINE_SINK_10, 2, s16le, + PIPELINE_SINK_10, 3, s16le, 1000, 0, 0) # PCM Low Latency, id 0 diff --git a/tools/topology/sof-apl-wm8804.m4 b/tools/topology/sof-apl-wm8804.m4 index e2ab8f816cf0..dbef0697d945 100644 --- a/tools/topology/sof-apl-wm8804.m4 +++ b/tools/topology/sof-apl-wm8804.m4 @@ -23,22 +23,34 @@ include(`platform/intel/bxt.m4') # PCM0 ----> volume -----> SSP5 (wm8804) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 5, s24le, 3, 48000, 48000, 48000) # # DAIs configuration # -# playback DAI is SSP5 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP5 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 5, SSP5-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) # PCM Low Latency, id 0 diff --git a/tools/topology/sof-cml-demux-rt5682-max98357a.m4 b/tools/topology/sof-cml-demux-rt5682-max98357a.m4 index cfd8e81a47fc..8ed40fd01ce3 100644 --- a/tools/topology/sof-cml-demux-rt5682-max98357a.m4 +++ b/tools/topology/sof-cml-demux-rt5682-max98357a.m4 @@ -13,24 +13,25 @@ include(`sof-cml-demux-rt5682.m4') # PCM6 ----> volume (pipe 8) ----> SSP1 (speaker - maxim98357a, BE link 5) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 8 on PCM 6 using max 2 channels of s32le. # Schedule 1000us deadline on core 0 with priority 0 # pipe-src pipeline is needed for older SSP config ifelse(SOF_ABI_VERSION_3_9_OR_GRT, `1', -`PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +`PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 7, 5, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000)', -`PIPELINE_PCM_ADD(sof/pipe-src-volume-playback.m4, +`PIPELINE_PCM_DAI_ADD(sof/pipe-src-volume-playback.m4, 7, 5, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000)') # @@ -40,20 +41,20 @@ ifelse(SOF_ABI_VERSION_3_9_OR_GRT, `1', dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 #With m/n divider available we can support 24 bit playback ifelse(SOF_ABI_VERSION_3_9_OR_GRT, `1', `DAI_ADD(sof/pipe-dai-playback.m4, 7, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_7, 2, s24le, + PIPELINE_SOURCE_7, 3, s24le, 1000, 0, 0)', `DAI_ADD(sof/pipe-dai-playback.m4, 7, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_7, 2, s16le, + PIPELINE_SOURCE_7, 3, s16le, 1000, 0, 0)') # PCM Low Latency, id 0 diff --git a/tools/topology/sof-cml-demux-rt5682.m4 b/tools/topology/sof-cml-demux-rt5682.m4 index b2e212dc1d2e..75715773e712 100644 --- a/tools/topology/sof-cml-demux-rt5682.m4 +++ b/tools/topology/sof-cml-demux-rt5682.m4 @@ -39,33 +39,40 @@ define(`SSP_NAME', ifelse(PLATFORM, `whl', `SSP1-Codec', # PCM5 <---- demux # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Demux pipeline 1 on PCM 0 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-demux-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-demux-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, SSP_INDEX, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, SSP_INDEX, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 1 using max 4 channels. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 3, 1, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -94,20 +101,20 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP(SPP_INDEX) using 2 periods +# playback DAI is SSP(SPP_INDEX) using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, SSP_INDEX, SSP_NAME, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is SSP(SSP_INDEX) using 2 periods +# capture DAI is SSP(SSP_INDEX) using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP,SSP_INDEX, SSP_NAME, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) # Capture pipeline 5 on PCM 5 using max 2 channels of s32le. @@ -136,11 +143,11 @@ SectionGraph."PIPE_CAP_VIRT" { ] } -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, DMIC, 0, dmic01, - PIPELINE_SINK_3, 2, s32le, + PIPELINE_SINK_3, 3, s32le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-cml-rt1011-rt5682.m4 b/tools/topology/sof-cml-rt1011-rt5682.m4 index 7d66c0d6f1de..01e4e0a39407 100644 --- a/tools/topology/sof-cml-rt1011-rt5682.m4 +++ b/tools/topology/sof-cml-rt1011-rt5682.m4 @@ -13,15 +13,18 @@ DEBUG_START # PCM5 ----> volume (pipe 7) ----> SSP1 (speaker - rt1011, BE link 5) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, -dnl frames, deadline, priority, core) +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 7 on PCM 5 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 7, 5, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s24le, 3, 48000, 48000, 48000) # @@ -31,13 +34,13 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl frames, deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 7, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_7, 2, s24le, + PIPELINE_SOURCE_7, 3, s24le, 48, 1000, 0, 0) # PCM Low Latency, id 0 diff --git a/tools/topology/sof-cml-rt5682-kwd.m4 b/tools/topology/sof-cml-rt5682-kwd.m4 index 440b7677b5cf..93eccffc2757 100644 --- a/tools/topology/sof-cml-rt5682-kwd.m4 +++ b/tools/topology/sof-cml-rt5682-kwd.m4 @@ -52,33 +52,40 @@ define(`SSP_MCLK_RATE', ifelse(PLATFORM, `icl', `19200000', # Detector <--- selector (pipe 9) <---+ # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # Schedule 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, SSP_INDEX, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. # Schedule 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, SSP_INDEX, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 1 using max 4 channels. # Schedule 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 3, 1, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s32le. # Schedule 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -107,27 +114,27 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP(SPP_INDEX) using 2 periods +# playback DAI is SSP(SPP_INDEX) using 3 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, SSP_INDEX, SSP_NAME, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is SSP(SSP_INDEX) using 2 periods +# capture DAI is SSP(SSP_INDEX) using 3 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP,SSP_INDEX, SSP_NAME, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, DMIC, 0, dmic01, - PIPELINE_SINK_3, 2, s32le, + PIPELINE_SINK_3, 3, s32le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods @@ -157,16 +164,16 @@ DAI_ADD(sof/pipe-dai-playback.m4, # Passthrough capture pipeline 7 on PCM 7 using max 2 channels. # Schedule 20000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-kfbm-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-kfbm-capture.m4, 8, 8, 2, s24le, - KWD_PIPE_SCH_DEADLINE_US, 0, 0, + KWD_PIPE_SCH_DEADLINE_US, 0, 0, DMIC, 1, s32le, 3, 16000, 16000, 16000) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s32le format, with 320 frame per 20000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 8, DMIC, 1, dmic16k, - PIPELINE_SINK_8, 2, s32le, + PIPELINE_SINK_8, 3, s32le, KWD_PIPE_SCH_DEADLINE_US, 0, 0) # PCM Low Latency, id 0 diff --git a/tools/topology/sof-cml-rt5682-max98357a.m4 b/tools/topology/sof-cml-rt5682-max98357a.m4 index 056ffe671c7a..1b5496511dcc 100644 --- a/tools/topology/sof-cml-rt5682-max98357a.m4 +++ b/tools/topology/sof-cml-rt5682-max98357a.m4 @@ -16,11 +16,12 @@ DEBUG_START # PCM5 ----> volume (pipe 7) ----> SSP1 (speaker - maxim98357a, BE link 5) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 7 on PCM 5 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 @@ -29,11 +30,11 @@ dnl time_domain, sched_comp) ifelse(SOF_ABI_VERSION_3_9_OR_GRT, `1', `PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, 7, 5, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000)', `PIPELINE_PCM_ADD(sof/pipe-src-volume-playback.m4, 7, 5, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000)') # @@ -43,20 +44,20 @@ ifelse(SOF_ABI_VERSION_3_9_OR_GRT, `1', dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 #With m/n divider available we can support 24 bit playback ifelse(SOF_ABI_VERSION_3_9_OR_GRT, `1', `DAI_ADD(sof/pipe-dai-playback.m4, 7, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_7, 2, s24le, + PIPELINE_SOURCE_7, 3, s24le, 1000, 0, 0)', `DAI_ADD(sof/pipe-dai-playback.m4, 7, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_7, 2, s16le, + PIPELINE_SOURCE_7, 3, s16le, 1000, 0, 0)') # PCM Low Latency, id 0 diff --git a/tools/topology/sof-cml-rt5682.m4 b/tools/topology/sof-cml-rt5682.m4 index c7b4a2080c30..f88c8af5ff46 100644 --- a/tools/topology/sof-cml-rt5682.m4 +++ b/tools/topology/sof-cml-rt5682.m4 @@ -48,33 +48,40 @@ define(`SSP_MCLK_RATE', ifelse(PLATFORM, `icl', `19200000', # PCM8 <---- volume <----- DMIC16k (dmic16k, BE link 2) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, SSP_INDEX, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, SSP_INDEX, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 1 using max 4 channels. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 3, 1, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -98,9 +105,9 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, # Passthrough capture pipeline 7 on PCM 5 using max 2 channels. # Schedule 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture-16khz.m4, 8, 8, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s32le, 3, 16000, 16000, 16000) # @@ -110,27 +117,27 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture-16khz.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP(SPP_INDEX) using 2 periods +# playback DAI is SSP(SPP_INDEX) using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, SSP_INDEX, SSP_NAME, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is SSP(SSP_INDEX) using 2 periods +# capture DAI is SSP(SSP_INDEX) using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP,SSP_INDEX, SSP_NAME, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, DMIC, 0, dmic01, - PIPELINE_SINK_3, 2, s32le, + PIPELINE_SINK_3, 3, s32le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods @@ -154,11 +161,11 @@ DAI_ADD(sof/pipe-dai-playback.m4, PIPELINE_SOURCE_6, 2, s32le, 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) -# capture DAI is DMIC16k using 2 periods +# capture DAI is DMIC16k using 3 periods # Buffers use s32le format, with 16 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 8, DMIC, 1, dmic16k, - PIPELINE_SINK_8, 2, s32le, + PIPELINE_SINK_8, 3, s32le, 16, 1000, 0, 0) diff --git a/tools/topology/sof-cml-rt700.m4 b/tools/topology/sof-cml-rt700.m4 index 81e407f498d6..4c006e2e0011 100644 --- a/tools/topology/sof-cml-rt700.m4 +++ b/tools/topology/sof-cml-rt700.m4 @@ -31,40 +31,47 @@ DEBUG_START # PCM6 ----> volume -----> iDisp3 (HDMI/DP playback, BE link 6) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, ALH, 0x102, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 1 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 1, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, ALH, 0x102, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 2 using max 4 channels. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 3, 2, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 4 on PCM 3 using max 2 channels. # Schedule 16 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 4, 3, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s16le, 3, 16000, 16000, 16000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 5 on PCM 4 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -95,32 +102,32 @@ dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, dnl deadline, priority, core, time_domain) -# playback DAI is ALH(SDW1 PIN2) using 2 periods +# playback DAI is ALH(SDW1 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, ALH, 0x102, SDW1-Playback, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is ALH(SDW1 PIN3) using 2 periods +# capture DAI is ALH(SDW1 PIN3) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, ALH, 0x103, SDW1-Capture, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, DMIC, 0, dmic01, - PIPELINE_SINK_3, 2, s32le, + PIPELINE_SINK_3, 3, s32le, 1000, 0, 0) -# capture DAI is DMIC16k using 2 periods +# capture DAI is DMIC16k using 3 periods # Buffers use s16le format, with 16 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, DMIC, 1, dmic16k, - PIPELINE_SINK_4, 2, s16le, + PIPELINE_SINK_4, 3, s16le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-cml-src-rt5682.m4 b/tools/topology/sof-cml-src-rt5682.m4 index fc300e541288..de1bdb671af6 100644 --- a/tools/topology/sof-cml-src-rt5682.m4 +++ b/tools/topology/sof-cml-src-rt5682.m4 @@ -31,33 +31,40 @@ DEBUG_START # PCM4 ----> volume -----> iDisp3 # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-src-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-src-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s24le, 3, 8000, 96000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 1 using max 4 channels. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 3, 1, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -86,27 +93,27 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is SSP1 using 2 periods +# capture DAI is SSP1 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP, 1, SSP1-Codec, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, DMIC, 0, dmic01, - PIPELINE_SINK_3, 2, s32le, + PIPELINE_SINK_3, 3, s32le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-cnl-nocodec.m4 b/tools/topology/sof-cnl-nocodec.m4 index e22170fc8078..06f056e9839a 100644 --- a/tools/topology/sof-cnl-nocodec.m4 +++ b/tools/topology/sof-cnl-nocodec.m4 @@ -27,59 +27,60 @@ include(`platform/intel/dmic.m4') # PCM3 <---- volume <----- DMIC3 (DMIC01) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 0, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 0, s24le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 3 on PCM 1 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 3, 1, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 4 on PCM 1 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 4, 1, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s24le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 5 on PCM 2 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 5, 2, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 6 on PCM 2 using max 2 channels of s24le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 2, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 7 on PCM 3 using max 4 channels. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 7, 3, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # @@ -89,55 +90,55 @@ PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP0 using 2 periods +# playback DAI is SSP0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 0, NoCodec-0, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is SSP0 using 2 periods +# capture DAI is SSP0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP, 0, NoCodec-0, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 3, SSP, 1, NoCodec-1, - PIPELINE_SOURCE_3, 2, s24le, + PIPELINE_SOURCE_3, 3, s24le, 1000, 0, 0) -# capture DAI is SSP1 using 2 periods +# capture DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, SSP, 1, NoCodec-1, - PIPELINE_SINK_4, 2, s24le, + PIPELINE_SINK_4, 3, s24le, 1000, 0, 0) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 5, SSP, 2, NoCodec-2, - PIPELINE_SOURCE_5, 2, s24le, + PIPELINE_SOURCE_5, 3, s24le, 1000, 0, 0) -# capture DAI is SSP2 using 2 periods +# capture DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, SSP, 2, NoCodec-2, - PIPELINE_SINK_6, 2, s24le, + PIPELINE_SINK_6, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 7, DMIC, 0, NoCodec-3, - PIPELINE_SINK_7, 2, s32le, + PIPELINE_SINK_7, 3, s32le, 1000, 0, 0) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-cnl-rt274.m4 b/tools/topology/sof-cnl-rt274.m4 index 6a0306b25553..36bf2a952bcc 100644 --- a/tools/topology/sof-cnl-rt274.m4 +++ b/tools/topology/sof-cnl-rt274.m4 @@ -24,18 +24,25 @@ include(`platform/intel/cnl.m4') # # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, SSP, 0, s24le, 2, + 1000, 0, 0, SSP, 0, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s24le, - 1000, 0, 0, SSP, 0, s24le, 2, + 1000, 0, 0, SSP, 0, s24le, 3, 48000, 48000, 48000) # @@ -44,18 +51,23 @@ PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, # SSP port 0 is our only pipeline DAI # -# playback DAI is SSP0 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP0 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 0, SSP0-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is SSP0 using 2 periods +# capture DAI is SSP0 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP, 0, SSP0-Codec, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) # PCM Low Latency diff --git a/tools/topology/sof-glk-da7219-kwd.m4 b/tools/topology/sof-glk-da7219-kwd.m4 index b56a3912c3c3..f3b2514ec6a1 100644 --- a/tools/topology/sof-glk-da7219-kwd.m4 +++ b/tools/topology/sof-glk-da7219-kwd.m4 @@ -34,34 +34,47 @@ define(KWD_PIPE_SCH_DEADLINE_US, 20000) # Detector <--- selector (pipe 9) <---+ # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 2, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 3 on PCM 1 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 3, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 4 on PCM 99 using max 4 channels of s32le. # Set 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 4, 99, 4, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s16le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s32le. # Set 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -87,32 +100,37 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, # DAIs configuration # -# playback DAI is SSP1 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_1, 2, s16le, + PIPELINE_SOURCE_1, 3, s16le, 1000, 0, 0) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 2, SSP, 2, SSP2-Codec, - PIPELINE_SOURCE_2, 2, s16le, + PIPELINE_SOURCE_2, 3, s16le, 1000, 0, 0) -# capture DAI is SSP2 using 2 periods +# capture DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, SSP, 2, SSP2-Codec, - PIPELINE_SINK_3, 2, s16le, + PIPELINE_SINK_3, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC0 using 2 periods +# capture DAI is DMIC0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, DMIC, 0, dmic01, - PIPELINE_SINK_4, 2, s16le, + PIPELINE_SINK_4, 3, s16le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods @@ -142,16 +160,16 @@ DAI_ADD(sof/pipe-dai-playback.m4, # Passthrough capture pipeline 8 on PCM 8 using max 2 channels. # Schedule 20000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-kfbm-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-kfbm-capture.m4, 8, 8, 2, s16le, - KWD_PIPE_SCH_DEADLINE_US, 0, 0, + KWD_PIPE_SCH_DEADLINE_US, 0, 0, DMIC, 1, s16le, 3, 16000, 16000, 16000) -# capture DAI is DMIC 1 using 2 periods +# capture DAI is DMIC 1 using 3 periods # Buffers use s16le format, with 320 frame per 20000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 8, DMIC, 1, dmic16k, - PIPELINE_SINK_8, 2, s16le, + PIPELINE_SINK_8, 3, s16le, KWD_PIPE_SCH_DEADLINE_US, 0, 0) PCM_PLAYBACK_ADD(Speakers, 0, PIPELINE_PCM_1) diff --git a/tools/topology/sof-glk-da7219.m4 b/tools/topology/sof-glk-da7219.m4 index 8a2c10a63254..fcb83f6a3ac8 100644 --- a/tools/topology/sof-glk-da7219.m4 +++ b/tools/topology/sof-glk-da7219.m4 @@ -29,35 +29,48 @@ include(`platform/intel/dmic.m4') # PCM7 ----> volume (pipe 7) -----> iDisp3 (HDMI/DP playback, BE link 5) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 2, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 3 on PCM 1 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 3, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 4 on PCM 99 using max 4 channels of s32le. # 1000us deadline on core 0 with priority 0 #PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 4, 99, 4, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s16le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 # PIPELINE_PCM_ADD(sof/pipe-passthrough-playback.m4, @@ -86,32 +99,37 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, # DAIs configuration # -# playback DAI is SSP1 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_1, 2, s16le, + PIPELINE_SOURCE_1, 3, s16le, 1000, 0, 0) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 2, SSP, 2, SSP2-Codec, - PIPELINE_SOURCE_2, 2, s16le, + PIPELINE_SOURCE_2, 3, s16le, 1000, 0, 0) -# capture DAI is SSP2 using 2 periods +# capture DAI is SSP2 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, SSP, 2, SSP2-Codec, - PIPELINE_SINK_3, 2, s16le, + PIPELINE_SINK_3, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC0 using 2 periods +# capture DAI is DMIC0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, DMIC, 0, dmic01, - PIPELINE_SINK_4, 2, s16le, + PIPELINE_SINK_4, 3, s16le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-glk-rt5682.m4 b/tools/topology/sof-glk-rt5682.m4 index 2ea764bb0173..a65d10ddbaf7 100644 --- a/tools/topology/sof-glk-rt5682.m4 +++ b/tools/topology/sof-glk-rt5682.m4 @@ -32,35 +32,48 @@ include(`platform/intel/dmic.m4') # PCM7 ----> volume (pipe 7) -----> iDisp3 (HDMI/DP playback, BE link 5) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 2, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 3 on PCM 1 using max 2 channels of s32le. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 3, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 4 on PCM 99 using max 4 channels of s16le. # 1000us deadline on core 0 with priority 0 #PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 4, 99, 4, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s16le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s16le. # 1000us deadline on core 0 with priority 0 # PIPELINE_PCM_ADD(sof/pipe-passthrough-playback.m4, @@ -89,32 +102,37 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, # DAIs configuration # -# playback DAI is SSP1 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 1, SSP1-Codec, - PIPELINE_SOURCE_1, 2, s16le, + PIPELINE_SOURCE_1, 3, s16le, 1000, 0, 0) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 2, SSP, 2, SSP2-Codec, - PIPELINE_SOURCE_2, 2, s16le, + PIPELINE_SOURCE_2, 3, s16le, 1000, 0, 0) -# capture DAI is SSP1 using 2 periods +# capture DAI is SSP1 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, SSP, 2, SSP2-Codec, - PIPELINE_SINK_3, 2, s16le, + PIPELINE_SINK_3, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC0 using 2 periods +# capture DAI is DMIC0 using 3 periods # Buffers use s16le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, DMIC, 0, dmic01, - PIPELINE_SINK_4, 2, s16le, + PIPELINE_SINK_4, 3, s16le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-icl-dmic-4ch.m4 b/tools/topology/sof-icl-dmic-4ch.m4 index 2cb26e007502..5114d9896765 100644 --- a/tools/topology/sof-icl-dmic-4ch.m4 +++ b/tools/topology/sof-icl-dmic-4ch.m4 @@ -23,17 +23,18 @@ include(`platform/intel/dmic.m4') # PCM6 <---- volume <----- DMIC01 (dmic0 capture) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Passthrough capture pipeline 1 on PCM 1 using max 4 channels. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 1, 1, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # @@ -43,14 +44,14 @@ PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl deadline, priority, core) +dnl deadline, priority, core, time_domain) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 1, DMIC, 0, dmic01, - PIPELINE_SINK_1, 2, s32le, + PIPELINE_SINK_1, 3, s32le, 1000, 0, 0) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-icl-nocodec.m4 b/tools/topology/sof-icl-nocodec.m4 index a27a25f2622a..b78c1fac695a 100644 --- a/tools/topology/sof-icl-nocodec.m4 +++ b/tools/topology/sof-icl-nocodec.m4 @@ -23,18 +23,25 @@ include(`platform/intel/icl.m4') # PCM0 <---> Volume <---> SSP0 (NoCodec) # +dnl PIPELINE_PCM_DAI_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) + # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, SSP, 0, s24le, 2, + 1000, 0, 0, SSP, 0, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. # 1000us deadline on core 0 with priority 0 PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s24le, - 1000, 0, 0, SSP, 0, s24le, 2, + 1000, 0, 0, SSP, 0, s24le, 3, 48000, 48000, 48000) # @@ -43,18 +50,23 @@ PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, # SSP port 0 is our only pipeline DAI # -# playback DAI is SSP0 using 2 periods +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# playback DAI is SSP0 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 0, NoCodec-0, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is SSP0 using 2 periods +# capture DAI is SSP0 using 3 periods # Buffers use s24le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP, 0, NoCodec-0, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) # PCM Low Latency diff --git a/tools/topology/sof-icl-rt700.m4 b/tools/topology/sof-icl-rt700.m4 index 50b0a734a4f8..015570fd6983 100644 --- a/tools/topology/sof-icl-rt700.m4 +++ b/tools/topology/sof-icl-rt700.m4 @@ -31,40 +31,46 @@ DEBUG_START # PCM6 ----> volume -----> iDisp3 (HDMI/DP playback, BE link 6) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, ALH, 2, s24le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 1 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 1, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, ALH, 3, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 2 using max 4 channels. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 3, 2, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 4 on PCM 3 using max 2 channels. # Schedule 16 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 4, 3, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 1, s16le, 3, 16000, 16000, 16000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) # Low Latency playback pipeline 5 on PCM 4 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 @@ -96,32 +102,32 @@ dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, dnl deadline, priority, core, time_domain) -# playback DAI is ALH(SDW0 PIN2) using 2 periods +# playback DAI is ALH(SDW0 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, ALH, 2, SDW0-Playback, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is ALH(SDW0 PIN2) using 2 periods +# capture DAI is ALH(SDW0 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, ALH, 3, SDW0-Capture, - PIPELINE_SINK_2, 2, s24le, + PIPELINE_SINK_2, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 3, DMIC, 0, dmic01, - PIPELINE_SINK_3, 2, s32le, + PIPELINE_SINK_3, 3, s32le, 1000, 0, 0) -# capture DAI is DMIC16k using 2 periods +# capture DAI is DMIC16k using 3 periods # Buffers use s16le format, with 16 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, DMIC, 1, dmic16k, - PIPELINE_SINK_4, 2, s16le, + PIPELINE_SINK_4, 3, s16le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof-icl-rt711-rt1308-rt715.m4 b/tools/topology/sof-icl-rt711-rt1308-rt715.m4 index 20c1ef491231..7b8c13668a90 100644 --- a/tools/topology/sof-icl-rt711-rt1308-rt715.m4 +++ b/tools/topology/sof-icl-rt711-rt1308-rt715.m4 @@ -27,45 +27,46 @@ DEBUG_START # PCM3 ---> volume ----> ALH 2 BE dailink 3 # PCM4 <--- volume <---- ALH 2 BE dailink 4 -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, dnl period, priority, core, -dnl pcm_min_rate, pcm_max_rate, pipeline_rate, -dnl time_domain, sched_comp) +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, ALH, 2, s32le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 1 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 1, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, ALH, 3, s32le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 3 on PCM 2 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 3, 2, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, ALH, 0x102, s32le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 4 on PCM 3 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 4, 3, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, ALH, 0x202, s32le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 5 on PCM 4 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 5, 4, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, ALH, 0x302, s32le, 3, 48000, 48000, 48000) # @@ -77,39 +78,39 @@ dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, dnl deadline, priority, core, time_domain) -# playback DAI is ALH(SDW0 PIN2) using 2 periods +# playback DAI is ALH(SDW0 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, ALH, 2, SDW0-Playback, - PIPELINE_SOURCE_1, 2, s32le, + PIPELINE_SOURCE_1, 3, s32le, 1000, 0, 0) -# capture DAI is ALH(SDW0 PIN2) using 2 periods +# capture DAI is ALH(SDW0 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, ALH, 3, SDW0-Capture, - PIPELINE_SINK_2, 2, s32le, + PIPELINE_SINK_2, 3, s32le, 1000, 0, 0) -# playback DAI is ALH(SDW1 PIN2) using 2 periods +# playback DAI is ALH(SDW1 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 3, ALH, 0x102, SDW1-Playback, - PIPELINE_SOURCE_3, 2, s32le, + PIPELINE_SOURCE_3, 3, s32le, 1000, 0, 0) -# playback DAI is ALH(SDW2 PIN2) using 2 periods +# playback DAI is ALH(SDW2 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 4, ALH, 0x202, SDW2-Playback, - PIPELINE_SOURCE_4, 2, s32le, + PIPELINE_SOURCE_4, 3, s32le, 1000, 0, 0) -# capture DAI is ALH(SDW3 PIN2) using 2 periods +# capture DAI is ALH(SDW3 PIN2) using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 5, ALH, 0x302, SDW3-Capture, - PIPELINE_SINK_5, 2, s32le, + PIPELINE_SINK_5, 3, s32le, 1000, 0, 0) diff --git a/tools/topology/sof-tgl-nocodec.m4 b/tools/topology/sof-tgl-nocodec.m4 index c0e33e73984f..99c98fb35f63 100644 --- a/tools/topology/sof-tgl-nocodec.m4 +++ b/tools/topology/sof-tgl-nocodec.m4 @@ -31,57 +31,60 @@ include(`platform/intel/dmic.m4') # PCM6 <---- volume <----- DMIC6 (DMIC01) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, -dnl frames, deadline, priority, core) +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s16le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, SSP, 0, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s16le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 2, 0, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, SSP, 0, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 3 on PCM 1 using max 2 channels of s16le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 3, 1, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 4 on PCM 1 using max 2 channels of s16le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 4, 1, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, SSP, 1, s16le, 3, 48000, 48000, 48000) # Low Latency playback pipeline 5 on PCM 2 using max 2 channels of s16le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 5, 2, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Low Latency capture pipeline 6 on PCM 2 using max 2 channels of s16le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, 6, 2, 2, s16le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s16le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 13 on PCM 6 using max 2 channels. # 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 13, 6, 2, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # # DAIs configuration @@ -90,55 +93,55 @@ PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl frames, deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP0 using 2 periods +# playback DAI is SSP0 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 0, NoCodec-0, - PIPELINE_SOURCE_1, 2, s16le, + PIPELINE_SOURCE_1, 3, s16le, 1000, 0, 0) -# capture DAI is SSP0 using 2 periods +# capture DAI is SSP0 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SSP, 0, NoCodec-0, - PIPELINE_SINK_2, 2, s16le, + PIPELINE_SINK_2, 3, s16le, 1000, 0, 0) -# playback DAI is SSP1 using 2 periods +# playback DAI is SSP1 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 3, SSP, 1, NoCodec-1, - PIPELINE_SOURCE_3, 2, s16le, + PIPELINE_SOURCE_3, 3, s16le, 1000, 0, 0) -# capture DAI is SSP1 using 2 periods +# capture DAI is SSP1 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, SSP, 1, NoCodec-1, - PIPELINE_SINK_4, 2, s16le, + PIPELINE_SINK_4, 3, s16le, 1000, 0, 0) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 5, SSP, 2, NoCodec-2, - PIPELINE_SOURCE_5, 2, s16le, + PIPELINE_SOURCE_5, 3, s16le, 1000, 0, 0) -# capture DAI is SSP2 using 2 periods +# capture DAI is SSP2 using 3 periods # Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 6, SSP, 2, NoCodec-2, - PIPELINE_SINK_6, 2, s16le, + PIPELINE_SINK_6, 3, s16le, 1000, 0, 0) -# capture DAI is DMIC 0 using 2 periods +# capture DAI is DMIC 0 using 3 periods # Buffers use s32le format, 1000us deadline on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 13, DMIC, 0, NoCodec-6, - PIPELINE_SINK_13, 2, s32le, + PIPELINE_SINK_13, 3, s32le, 1000, 0, 0) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/sof-tgl-rt1308-nohdmi.m4 b/tools/topology/sof-tgl-rt1308-nohdmi.m4 index 9f6d1e36b235..30d0b29f51e1 100644 --- a/tools/topology/sof-tgl-rt1308-nohdmi.m4 +++ b/tools/topology/sof-tgl-rt1308-nohdmi.m4 @@ -27,22 +27,25 @@ DEBUG_START # PCM1 <---- volume <----- DMIC01 (dmic0 capture) # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, -dnl frames, deadline, priority, core) +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 1 using max 4 channels. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 2, 1, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) # @@ -52,20 +55,20 @@ PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl frames, deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 2, SSP2-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, DMIC, 0, dmic01, - PIPELINE_SINK_2, 2, s32le, + PIPELINE_SINK_2, 3, s32le, 1000, 0, 0) # PCM Low Latency, id 0 diff --git a/tools/topology/sof-tgl-rt1308.m4 b/tools/topology/sof-tgl-rt1308.m4 index 594146a34f35..a94ad9fc927e 100644 --- a/tools/topology/sof-tgl-rt1308.m4 +++ b/tools/topology/sof-tgl-rt1308.m4 @@ -31,24 +31,33 @@ DEBUG_START # PCM5 ----> volume -----> iDisp4 # -dnl PIPELINE_PCM_ADD(pipeline, +dnl PIPELINE_PCM_DAI_ADD(pipeline, dnl pipe id, pcm, max channels, format, -dnl frames, deadline, priority, core) +dnl period, priority, core, +dnl dai type, dai_index, dai format, +dnl dai periods, pcm_min_rate, pcm_max_rate, +dnl pipeline_rate, time_domain) # Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, 1, 0, 2, s24le, - 1000, 0, 0, + 1000, 0, 0, SSP, 2, s24le, 3, 48000, 48000, 48000) # Passthrough capture pipeline 3 on PCM 1 using max 4 channels. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, +PIPELINE_PCM_DAI_ADD(sof/pipe-passthrough-capture.m4, 2, 1, 4, s32le, - 1000, 0, 0, + 1000, 0, 0, DMIC, 0, s32le, 3, 48000, 48000, 48000) +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + # Low Latency playback pipeline 2 on PCM 2 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -84,20 +93,20 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, dnl DAI_ADD(pipeline, dnl pipe id, dai type, dai_index, dai_be, dnl buffer, periods, format, -dnl frames, deadline, priority, core) +dnl deadline, priority, core, time_domain) -# playback DAI is SSP2 using 2 periods +# playback DAI is SSP2 using 3 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 1, SSP, 2, SSP2-Codec, - PIPELINE_SOURCE_1, 2, s24le, + PIPELINE_SOURCE_1, 3, s24le, 1000, 0, 0) -# capture DAI is DMIC01 using 2 periods +# capture DAI is DMIC01 using 3 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, DMIC, 0, dmic01, - PIPELINE_SINK_2, 2, s32le, + PIPELINE_SINK_2, 3, s32le, 1000, 0, 0) # playback DAI is iDisp1 using 2 periods diff --git a/tools/topology/sof/pipe-dai-capture.m4 b/tools/topology/sof/pipe-dai-capture.m4 index 9e68fff8d0c5..40d2daf47437 100644 --- a/tools/topology/sof/pipe-dai-capture.m4 +++ b/tools/topology/sof/pipe-dai-capture.m4 @@ -8,7 +8,7 @@ include(`pipeline.m4') # # DAI definitions # -W_DAI_IN(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 2, 0, 0) +W_DAI_IN(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, DAI_PERIODS, 0) # # DAI pipeline - always use 0 for DAIs diff --git a/tools/topology/sof/pipe-dai-playback.m4 b/tools/topology/sof/pipe-dai-playback.m4 index 70a0518c74ae..47098bdaef2e 100644 --- a/tools/topology/sof/pipe-dai-playback.m4 +++ b/tools/topology/sof/pipe-dai-playback.m4 @@ -8,7 +8,7 @@ include(`pipeline.m4') # # DAI definitions # -W_DAI_OUT(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, 2, 2) +W_DAI_OUT(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, DAI_PERIODS) # # DAI pipeline - always use 0 for DAIs diff --git a/tools/topology/sof/pipe-eq-capture-16khz.m4 b/tools/topology/sof/pipe-eq-capture-16khz.m4 index 4cdafff62b82..9ed8f49f1774 100644 --- a/tools/topology/sof/pipe-eq-capture-16khz.m4 +++ b/tools/topology/sof/pipe-eq-capture-16khz.m4 @@ -65,8 +65,8 @@ W_PGA(0, PIPELINE_FORMAT, 2, 2, capture_pga_conf, LIST(` ', "PIPELINE_ID Master Capture Volume")) -# "EQ 0" has 2 sink period and 2 source periods -W_EQ_IIR(0, PIPELINE_FORMAT, 2, 2, LIST(` ', "EQIIR_C16")) +# "EQ 0" has 2 sink period and x source periods +W_EQ_IIR(0, PIPELINE_FORMAT, 2, DAI_PERIODS, LIST(` ', "EQIIR_C16")) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, @@ -77,7 +77,7 @@ W_BUFFER(1, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, eval(PCM_MAX_RATE / SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP) -W_BUFFER(2, COMP_BUFFER_SIZE(2, +W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, eval(PCM_MAX_RATE / SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP) diff --git a/tools/topology/sof/pipe-eq-capture.m4 b/tools/topology/sof/pipe-eq-capture.m4 index 66760e68e0a0..a0346ebc7c77 100644 --- a/tools/topology/sof/pipe-eq-capture.m4 +++ b/tools/topology/sof/pipe-eq-capture.m4 @@ -66,8 +66,8 @@ W_PGA(0, PIPELINE_FORMAT, 2, 2, capture_pga_conf, LIST(` ', "PIPELINE_ID Master Capture Volume")) -# "EQ 0" has 2 sink period and 2 source periods -W_EQ_IIR(0, PIPELINE_FORMAT, 2, 2, LIST(` ', "EQIIR_C48")) +# "EQ 0" has 2 sink period and x source periods +W_EQ_IIR(0, PIPELINE_FORMAT, 2, DAI_PERIODS, LIST(` ', "EQIIR_C48")) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, @@ -78,7 +78,7 @@ W_BUFFER(1, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP) -W_BUFFER(2, COMP_BUFFER_SIZE(2, +W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP) diff --git a/tools/topology/sof/pipe-eq-fir-volume-playback.m4 b/tools/topology/sof/pipe-eq-fir-volume-playback.m4 index 051e162e92f5..b85e0c3ce30d 100644 --- a/tools/topology/sof/pipe-eq-fir-volume-playback.m4 +++ b/tools/topology/sof/pipe-eq-fir-volume-playback.m4 @@ -57,8 +57,8 @@ C_CONTROLBYTES(EQFIR, PIPELINE_ID, # with 2 sink and 0 source periods W_PCM_PLAYBACK(PCM_ID, Passthrough Playback, 2, 0) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) +# "Volume" has 2 source and x sink periods +W_PGA(0, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) # "EQ 0" has 2 sink period and 2 source periods W_EQ_FIR(0, PIPELINE_FORMAT, 2, 2, LIST(` ', "EQFIR")) @@ -70,7 +70,7 @@ W_BUFFER(0, COMP_BUFFER_SIZE(2, W_BUFFER(1, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(2, COMP_BUFFER_SIZE(2, +W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-eq-iir-volume-playback.m4 b/tools/topology/sof/pipe-eq-iir-volume-playback.m4 index 65d7ba0fae86..f433a4bf5dde 100644 --- a/tools/topology/sof/pipe-eq-iir-volume-playback.m4 +++ b/tools/topology/sof/pipe-eq-iir-volume-playback.m4 @@ -57,8 +57,8 @@ C_CONTROLBYTES(EQIIR, PIPELINE_ID, # with 2 sink and 0 source periods W_PCM_PLAYBACK(PCM_ID, Passthrough Playback, 2, 0) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) +# "Volume" has 2 source and x sink periods +W_PGA(0, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) # "EQ 0" has 2 sink period and 2 source periods W_EQ_IIR(0, PIPELINE_FORMAT, 2, 2, LIST(` ', "EQIIR")) @@ -70,7 +70,7 @@ W_BUFFER(0, COMP_BUFFER_SIZE(2, W_BUFFER(1, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(2, COMP_BUFFER_SIZE(2, +W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-eq-volume-playback.m4 b/tools/topology/sof/pipe-eq-volume-playback.m4 index 324ef49e9b74..e60bf40faed6 100644 --- a/tools/topology/sof/pipe-eq-volume-playback.m4 +++ b/tools/topology/sof/pipe-eq-volume-playback.m4 @@ -71,8 +71,8 @@ C_CONTROLBYTES(EQFIR, PIPELINE_ID, # with 2 sink and 0 source periods W_PCM_PLAYBACK(PCM_ID, Passthrough Playback, 2, 0) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) +# "Volume" has 2 source and x sink periods +W_PGA(0, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) # "EQ 0" has 2 sink period and 2 source periods W_EQ_IIR(0, PIPELINE_FORMAT, 2, 2, LIST(` ', "EQIIR")) @@ -90,7 +90,7 @@ W_BUFFER(1, COMP_BUFFER_SIZE(2, W_BUFFER(2, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(3, COMP_BUFFER_SIZE(2, +W_BUFFER(3, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-kfbm-capture.m4 b/tools/topology/sof/pipe-kfbm-capture.m4 index bc35c12df2b7..fa652fdd3b17 100644 --- a/tools/topology/sof/pipe-kfbm-capture.m4 +++ b/tools/topology/sof/pipe-kfbm-capture.m4 @@ -71,14 +71,14 @@ W_DATA(capture_pga_conf, capture_pga_tokens) # with 0 sink and 2 source periods W_PCM_CAPTURE(PCM_ID, Sound Trigger Capture, 0, 2, 2) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, capture_pga_conf, LIST(` ', "PIPELINE_ID KWD Capture Volume")) +# "Volume" has x source and 2 sink periods +W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, LIST(` ', "PIPELINE_ID KWD Capture Volume")) # "KPBM" has 2 source and 2 sink periods W_KPBM(0, PIPELINE_FORMAT, 2, 2, PIPELINE_ID, LIST(` ', "KPB")) # Capture Buffers -W_BUFFER(0, COMP_BUFFER_SIZE(2, +W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) # Capture Buffers diff --git a/tools/topology/sof/pipe-low-latency-capture.m4 b/tools/topology/sof/pipe-low-latency-capture.m4 index 823f92b21fb3..f83fbcb70e7e 100644 --- a/tools/topology/sof/pipe-low-latency-capture.m4 +++ b/tools/topology/sof/pipe-low-latency-capture.m4 @@ -41,11 +41,11 @@ W_DATA(capture_pga_conf, capture_pga_tokens) # with 0 sink and 2 source periods W_PCM_CAPTURE(PCM_ID, Low Latency Capture, 0, 2) -# "Capture Volume" has 2 sink and source periods for host and DAI ping-pong -W_PGA(0, PIPELINE_FORMAT, 2, 2, capture_pga_conf, LIST(` ', "PIPELINE_ID PCM PCM_ID Capture Volume")) +# "Capture Volume" has 2 sink and x source periods for host and DAI ping-pong +W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, LIST(` ', "PIPELINE_ID PCM PCM_ID Capture Volume")) # Capture Buffers -W_BUFFER(0, COMP_BUFFER_SIZE(2, +W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(2, diff --git a/tools/topology/sof/pipe-low-latency-playback.m4 b/tools/topology/sof/pipe-low-latency-playback.m4 index 3f087748d712..f6b12a4825d5 100644 --- a/tools/topology/sof/pipe-low-latency-playback.m4 +++ b/tools/topology/sof/pipe-low-latency-playback.m4 @@ -69,8 +69,8 @@ W_PCM_PLAYBACK(PCM_ID, Low Latency Playback, 2, 0) # "Playback Volume" has 2 sink periods and 2 source periods for host ping-pong W_PGA(0, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID PCM PCM_ID Playback Volume")) -# "Master Playback Volume" has 2 source and 2 sink periods for DAI ping-pong -W_PGA(1, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) +# "Master Playback Volume" has 2 source and x sink periods for DAI ping-pong +W_PGA(1, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) # Mixer 0 has 2 sink and source periods. W_MIXER(0, PIPELINE_FORMAT, 2, 2) @@ -85,7 +85,7 @@ W_BUFFER(1, COMP_BUFFER_SIZE(2, W_BUFFER(2, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_COMP_MEM_CAP) -W_BUFFER(3, COMP_BUFFER_SIZE(2, +W_BUFFER(3, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-passthrough-capture-sched.m4 b/tools/topology/sof/pipe-passthrough-capture-sched.m4 index 650007b39fa7..948583f6c5a1 100644 --- a/tools/topology/sof/pipe-passthrough-capture-sched.m4 +++ b/tools/topology/sof/pipe-passthrough-capture-sched.m4 @@ -17,10 +17,10 @@ include(`pipeline.m4') # Host "Passthrough Capture" PCM # with 0 sink and 2 source periods -W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2) +W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, DAI_PERIODS) # Capture Buffers -W_BUFFER(0, COMP_BUFFER_SIZE(2, +W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP) diff --git a/tools/topology/sof/pipe-passthrough-capture.m4 b/tools/topology/sof/pipe-passthrough-capture.m4 index f0cb255e032d..0bbe422605bb 100644 --- a/tools/topology/sof/pipe-passthrough-capture.m4 +++ b/tools/topology/sof/pipe-passthrough-capture.m4 @@ -17,10 +17,10 @@ include(`pipeline.m4') # Host "Passthrough Capture" PCM # with 0 sink and 2 source periods -W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2) +W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, DAI_PERIODS) # Capture Buffers -W_BUFFER(0, COMP_BUFFER_SIZE(2, +W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP) diff --git a/tools/topology/sof/pipe-passthrough-playback.m4 b/tools/topology/sof/pipe-passthrough-playback.m4 index 4da8b30da638..72f785ab9d55 100644 --- a/tools/topology/sof/pipe-passthrough-playback.m4 +++ b/tools/topology/sof/pipe-passthrough-playback.m4 @@ -17,10 +17,10 @@ include(`pipeline.m4') # Host "Passthrough Playback" PCM # with 2 sink and 0 source periods -W_PCM_PLAYBACK(PCM_ID, Passthrough Playback, 2, 0) +W_PCM_PLAYBACK(PCM_ID, Passthrough Playback, DAI_PERIODS, 0) # Playback Buffers -W_BUFFER(0, COMP_BUFFER_SIZE(2, +W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_PASS_MEM_CAP) diff --git a/tools/topology/sof/pipe-src-volume-playback.m4 b/tools/topology/sof/pipe-src-volume-playback.m4 index c79f53fd5142..98d17bf5cafb 100644 --- a/tools/topology/sof/pipe-src-volume-playback.m4 +++ b/tools/topology/sof/pipe-src-volume-playback.m4 @@ -56,8 +56,8 @@ LIST(` ', `SOF_TKN_VOLUME_RAMP_STEP_TYPE "0"' W_DATA(playback_pga_conf, playback_pga_tokens) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) +# "Volume" has 2 source and x sink periods +W_PGA(0, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) # Playback Buffers W_BUFFER(0, COMP_BUFFER_SIZE(3, @@ -66,7 +66,7 @@ W_BUFFER(0, COMP_BUFFER_SIZE(3, W_BUFFER(1, COMP_BUFFER_SIZE(3, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(2, COMP_BUFFER_SIZE(2, +W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-volume-capture-16khz.m4 b/tools/topology/sof/pipe-volume-capture-16khz.m4 index 342839637ab5..23f88732ac9e 100644 --- a/tools/topology/sof/pipe-volume-capture-16khz.m4 +++ b/tools/topology/sof/pipe-volume-capture-16khz.m4 @@ -46,14 +46,14 @@ W_DATA(playback_pga_conf, playback_pga_tokens) # with 0 sink and 2 source periods W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Capture Volume")) +# "Volume" has x source and 2 sink periods +W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Capture Volume")) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(1, COMP_BUFFER_SIZE(2, +W_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-volume-capture-sched.m4 b/tools/topology/sof/pipe-volume-capture-sched.m4 index 5f96149885e4..955f96d1ccc6 100644 --- a/tools/topology/sof/pipe-volume-capture-sched.m4 +++ b/tools/topology/sof/pipe-volume-capture-sched.m4 @@ -33,14 +33,14 @@ C_CONTROLMIXER(Master Capture Volume, PIPELINE_ID, # with 0 sink and 2 source periods W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, LIST(` ', "PIPELINE_ID Master Capture Volume")) +# "Volume" has x source and 2 sink periods +W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, LIST(` ', "PIPELINE_ID Master Capture Volume")) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(1, COMP_BUFFER_SIZE(2, +W_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-volume-capture.m4 b/tools/topology/sof/pipe-volume-capture.m4 index d85fdbe39b60..4815df58e2ca 100644 --- a/tools/topology/sof/pipe-volume-capture.m4 +++ b/tools/topology/sof/pipe-volume-capture.m4 @@ -43,14 +43,14 @@ W_DATA(capture_pga_conf, capture_pga_tokens) # with 0 sink and 2 source periods W_PCM_CAPTURE(PCM_ID, Passthrough Capture, 0, 2) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, capture_pga_conf, LIST(` ', "PIPELINE_ID Master Capture Volume")) +# "Volume" has x source and 2 sink periods +W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, LIST(` ', "PIPELINE_ID Master Capture Volume")) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(1, COMP_BUFFER_SIZE(2, +W_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP) diff --git a/tools/topology/sof/pipe-volume-demux-playback.m4 b/tools/topology/sof/pipe-volume-demux-playback.m4 index e0f6360efab7..5b3ae308ed8f 100644 --- a/tools/topology/sof/pipe-volume-demux-playback.m4 +++ b/tools/topology/sof/pipe-volume-demux-playback.m4 @@ -61,8 +61,8 @@ W_DATA(playback_pga_conf, playback_pga_tokens) # with 2 sink and 0 source periods W_PCM_PLAYBACK(PCM_ID, Low Latency Playback, 2, 0) -# "Master Playback Volume" has 2 source and 2 sink periods for DAI ping-pong -W_PGA(1, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) +# "Master Playback Volume" has 2 source and x sink periods for DAI ping-pong +W_PGA(1, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) # Mux 0 has 2 sink and source periods. W_MUXDEMUX(0, 1, PIPELINE_FORMAT, 2, 2, LIST(` ', "DEMUX")) @@ -74,7 +74,7 @@ W_BUFFER(0, COMP_BUFFER_SIZE(2, W_BUFFER(1, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_COMP_MEM_CAP) -W_BUFFER(2, COMP_BUFFER_SIZE(2, +W_BUFFER(2, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_COMP_MEM_CAP) diff --git a/tools/topology/sof/pipe-volume-playback.m4 b/tools/topology/sof/pipe-volume-playback.m4 index a6d917621bfd..6bc2805cb808 100644 --- a/tools/topology/sof/pipe-volume-playback.m4 +++ b/tools/topology/sof/pipe-volume-playback.m4 @@ -44,14 +44,14 @@ W_DATA(playback_pga_conf, playback_pga_tokens) W_PCM_PLAYBACK(PCM_ID, Passthrough Playback, 2, 0) -# "Volume" has 2 source and 2 sink periods -W_PGA(0, PIPELINE_FORMAT, 2, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) +# "Volume" has 2 source and x sink periods +W_PGA(0, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, LIST(` ', "PIPELINE_ID Master Playback Volume")) # Playback Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_HOST_MEM_CAP) -W_BUFFER(1, COMP_BUFFER_SIZE(2, +W_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), PLATFORM_DAI_MEM_CAP)