From cf1f0c2ff1c3681c4876320f337ff8a55a94eb05 Mon Sep 17 00:00:00 2001 From: Jakub Dabek Date: Fri, 21 Jun 2019 11:50:12 +0200 Subject: [PATCH 1/2] memory: removed hp buffer heap Merged hp buffer heap with normal buffer heap. Since current buffer heap was actually using hp memory and it served no purpose to have two heaps. Removed extern capabilities and merged other capabiliteis to buffer heap. Currently none of those buffer heaps supports extern. Signed-off-by: Jakub Dabek --- scripts/qemu-check.sh | 6 ++-- src/platform/apollolake/apollolake.x.in | 12 ------- .../apollolake/include/platform/lib/memory.h | 20 ++++-------- src/platform/cannonlake/cannonlake.x.in | 12 ------- .../cannonlake/include/platform/lib/memory.h | 21 +++--------- src/platform/icelake/icelake.x.in | 12 ------- .../icelake/include/platform/lib/memory.h | 17 +++------- src/platform/intel/cavs/lib/memory.c | 32 +++++-------------- .../suecreek/include/platform/lib/memory.h | 13 +++----- src/platform/suecreek/suecreek.x.in | 4 --- .../tigerlake/include/platform/lib/memory.h | 2 +- 11 files changed, 32 insertions(+), 119 deletions(-) diff --git a/scripts/qemu-check.sh b/scripts/qemu-check.sh index cf5d3ad5d421..6c679e3c6c7f 100755 --- a/scripts/qemu-check.sh +++ b/scripts/qemu-check.sh @@ -59,7 +59,7 @@ do then READY_IPC="00 00 00 f0" SHM_IPC_REG=qemu-bridge-ipc-io - OUTBOX_OFFSET="11000" + OUTBOX_OFFSET="7000" SHM_MBOX=qemu-bridge-hp-sram-mem ROM="-r ../sof.git/build_${j}_gcc/src/arch/xtensa/rom-$j.bin" fi @@ -67,7 +67,7 @@ do then READY_IPC="00 00 00 f0" SHM_IPC_REG=qemu-bridge-ipc-io - OUTBOX_OFFSET="11000" + OUTBOX_OFFSET="7000" SHM_MBOX=qemu-bridge-hp-sram-mem ROM="-r ../sof.git/build_${j}_gcc/src/arch/xtensa/rom-$j.bin" fi @@ -75,7 +75,7 @@ do then READY_IPC="00 00 00 f0" SHM_IPC_REG=qemu-bridge-ipc-io - OUTBOX_OFFSET="11000" + OUTBOX_OFFSET="7000" SHM_MBOX=qemu-bridge-hp-sram-mem ROM="-r ../sof.git/build_${j}_gcc/src/arch/xtensa/rom-$j.bin" fi diff --git a/src/platform/apollolake/apollolake.x.in b/src/platform/apollolake/apollolake.x.in index e61bf37fb46f..c24ed758f4b8 100644 --- a/src/platform/apollolake/apollolake.x.in +++ b/src/platform/apollolake/apollolake.x.in @@ -89,9 +89,6 @@ MEMORY sof_fw : org = SOF_FW_BASE, len = SOF_FW_MAX_SIZE - buffer_hp_heap : - org = HEAP_HP_BUFFER_BASE, - len = HEAP_HP_BUFFER_SIZE wnd0 : org = HP_SRAM_WIN0_BASE, len = HP_SRAM_WIN0_SIZE @@ -136,7 +133,6 @@ PHDRS vector_double_lit_phdr PT_LOAD; vector_double_text_phdr PT_LOAD; sof_fw_phdr PT_LOAD; - buffer_hp_heap_phdr PT_LOAD; wnd0_phdr PT_LOAD; wnd1_phdr PT_LOAD; wnd2_phdr PT_LOAD; @@ -174,14 +170,6 @@ SECTIONS _MemoryExceptionVector_text_end = ABSOLUTE(.); } >vector_memory_text :vector_memory_text_phdr - .buffer_hp_heap (NOLOAD) : ALIGN(8) - { - . = ALIGN (32); - _buffer_hp_heap_start = ABSOLUTE(.); - . = . + HEAP_HP_BUFFER_SIZE; - _buffer_hp_heap_end = ABSOLUTE(.); - } >buffer_hp_heap :buffer_hp_heap_phdr - .wnd0 (NOLOAD) : ALIGN(8) { . = ALIGN (32); diff --git a/src/platform/apollolake/include/platform/lib/memory.h b/src/platform/apollolake/include/platform/lib/memory.h index 93575691183b..20407b54cc95 100644 --- a/src/platform/apollolake/include/platform/lib/memory.h +++ b/src/platform/apollolake/include/platform/lib/memory.h @@ -121,8 +121,6 @@ * +--------------------------------------------------------------------------+ * | Offset | Region | Size | * +------------------+-------------------------+-----------------------------+ - * | HP_SRAM_BASE | DMA | HEAP_HP_BUFFER_SIZE | - * +------------------+-------------------------+-----------------------------+ * | SRAM_SW_REG_BASE | SW Registers W0 | SRAM_SW_REG_SIZE | * +------------------+-------------------------+-----------------------------+ * | SRAM_OUTBOX_BASE | Outbox W0 | SRAM_MAILBOX_SIZE | @@ -164,14 +162,6 @@ #define HP_SRAM_BASE 0xBE000000 #define HP_SRAM_MASK 0xFF000000 -/* HP SRAM Heap */ -#define HEAP_HP_BUFFER_BASE HP_SRAM_BASE -#define HEAP_HP_BUFFER_SIZE 0xA000 - -#define HEAP_HP_BUFFER_BLOCK_SIZE 0x180 -#define HEAP_HP_BUFFER_COUNT \ - (HEAP_HP_BUFFER_SIZE / HEAP_HP_BUFFER_BLOCK_SIZE) - /* HP SRAM windows */ /* window 3 */ @@ -226,7 +216,7 @@ #define SRAM_ALIAS_OFFSET 0x20000000 -#define SRAM_WND_BASE (HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE) +#define SRAM_WND_BASE (HP_SRAM_BASE) #define HP_SRAM_VECBASE_RESET (HP_SRAM_WIN0_BASE + HP_SRAM_WIN0_SIZE) #define HP_SRAM_VECBASE_OFFSET 0x0 @@ -282,7 +272,8 @@ HEAP_RT_COUNT256 * 256 + HEAP_RT_COUNT512 * 512 + \ HEAP_RT_COUNT1024 * 1024) -#define HEAP_BUFFER_SIZE 0x8000 +#define HEAP_BUFFER_SIZE 0x10000 + #define HEAP_BUFFER_BLOCK_SIZE 0x180 #define HEAP_BUFFER_COUNT (HEAP_BUFFER_SIZE / HEAP_BUFFER_BLOCK_SIZE) @@ -377,7 +368,7 @@ #define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_RUNTIME 1 -#define PLATFORM_HEAP_BUFFER 3 +#define PLATFORM_HEAP_BUFFER 2 /* Stack configuration */ #define SOF_LP_STACK_SIZE 0x1000 @@ -428,7 +419,8 @@ #define IMR_BOOT_LDR_BSS_SIZE 0x10000 /* Temporary stack place for boot_ldr */ -#define BOOT_LDR_STACK_BASE HEAP_HP_BUFFER_BASE +#define BOOT_LDR_STACK_BASE (HP_SRAM_BASE + HP_SRAM_SIZE - \ + SOF_STACK_TOTAL_SIZE) #define BOOT_LDR_STACK_SIZE SOF_STACK_TOTAL_SIZE /** \brief Manifest base address in IMR - used by boot loader copy procedure. */ diff --git a/src/platform/cannonlake/cannonlake.x.in b/src/platform/cannonlake/cannonlake.x.in index 50154605fc88..7c9b65e4c93e 100644 --- a/src/platform/cannonlake/cannonlake.x.in +++ b/src/platform/cannonlake/cannonlake.x.in @@ -81,9 +81,6 @@ MEMORY sof_fw : org = SOF_FW_BASE, len = SOF_FW_MAX_SIZE - buffer_hp_heap : - org = HEAP_HP_BUFFER_BASE, - len = HEAP_HP_BUFFER_SIZE wnd0 : org = HP_SRAM_WIN0_BASE, len = HP_SRAM_WIN0_SIZE @@ -125,7 +122,6 @@ PHDRS vector_double_lit_phdr PT_LOAD; vector_double_text_phdr PT_LOAD; sof_fw_phdr PT_LOAD; - buffer_hp_heap_phdr PT_LOAD; wnd0_phdr PT_LOAD; wnd1_phdr PT_LOAD; wnd2_phdr PT_LOAD; @@ -153,14 +149,6 @@ SECTIONS _MemoryExceptionVector_text_end = ABSOLUTE(.); } >vector_memory_text :vector_memory_text_phdr - .buffer_hp_heap (NOLOAD) : ALIGN(8) - { - . = ALIGN (32); - _buffer_hp_heap_start = ABSOLUTE(.); - . = . + HEAP_HP_BUFFER_SIZE; - _buffer_hp_heap_end = ABSOLUTE(.); - } >buffer_hp_heap :buffer_hp_heap_phdr - .wnd0 (NOLOAD) : ALIGN(8) { . = ALIGN (32); diff --git a/src/platform/cannonlake/include/platform/lib/memory.h b/src/platform/cannonlake/include/platform/lib/memory.h index 5ab8511a93d8..9b4df52d1f20 100644 --- a/src/platform/cannonlake/include/platform/lib/memory.h +++ b/src/platform/cannonlake/include/platform/lib/memory.h @@ -143,8 +143,6 @@ * +------------------+-------------------------+-----------------------------+ * | SRAM_TRACE_BASE | Trace Buffer W3 | SRAM_TRACE_SIZE | * +------------------+-------------------------+-----------------------------+ - * | HP_SRAM_BASE | DMA | HEAP_HP_BUFFER_SIZE | - * +------------------+-------------------------+-----------------------------+ * | SOF_FW_START | text | | * | | data | | * | | ----------------------- | | @@ -220,18 +218,8 @@ #define HP_SRAM_WIN3_BASE SRAM_TRACE_BASE #define HP_SRAM_WIN3_SIZE SRAM_TRACE_SIZE -#define HEAP_HP_BUFFER_BASE (SRAM_TRACE_BASE + SRAM_TRACE_SIZE) -#if CONFIG_COMP_KPB -#define HEAP_HP_BUFFER_SIZE 0x40000 -#else -#define HEAP_HP_BUFFER_SIZE 0x20000 -#endif -#define HEAP_HP_BUFFER_BLOCK_SIZE 0x100 -#define HEAP_HP_BUFFER_COUNT \ - (HEAP_HP_BUFFER_SIZE / HEAP_HP_BUFFER_BLOCK_SIZE) - /* HP SRAM Base */ -#define HP_SRAM_VECBASE_RESET (HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE) +#define HP_SRAM_VECBASE_RESET (SRAM_TRACE_BASE + SRAM_TRACE_SIZE) /* text and data share the same HP L2 SRAM on Cannonlake */ #define SOF_FW_START (HP_SRAM_VECBASE_RESET + 0x400) @@ -266,7 +254,7 @@ HEAP_RT_COUNT256 * 256 + HEAP_RT_COUNT512 * 512 + \ HEAP_RT_COUNT1024 * 1024) -#define HEAP_BUFFER_SIZE 0xF000 +#define HEAP_BUFFER_SIZE 0x50000 #define HEAP_BUFFER_BLOCK_SIZE 0x180 #define HEAP_BUFFER_COUNT (HEAP_BUFFER_SIZE / HEAP_BUFFER_BLOCK_SIZE) @@ -365,7 +353,7 @@ #define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_RUNTIME 1 -#define PLATFORM_HEAP_BUFFER 3 +#define PLATFORM_HEAP_BUFFER 2 /* Stack configuration */ #define SOF_LP_STACK_SIZE 0x1000 @@ -411,7 +399,8 @@ #define IMR_BOOT_LDR_BSS_SIZE 0x10000 /* Temporary stack place for boot_ldr */ -#define BOOT_LDR_STACK_BASE HEAP_HP_BUFFER_BASE +#define BOOT_LDR_STACK_BASE (HP_SRAM_BASE + HP_SRAM_SIZE - \ + SOF_STACK_TOTAL_SIZE) #define BOOT_LDR_STACK_SIZE SOF_STACK_TOTAL_SIZE #define uncache_to_cache(address) \ diff --git a/src/platform/icelake/icelake.x.in b/src/platform/icelake/icelake.x.in index 0da6ed9ee060..e768bdfd1a85 100644 --- a/src/platform/icelake/icelake.x.in +++ b/src/platform/icelake/icelake.x.in @@ -81,9 +81,6 @@ MEMORY sof_fw : org = SOF_FW_BASE, len = SOF_FW_MAX_SIZE - buffer_hp_heap : - org = HEAP_HP_BUFFER_BASE, - len = HEAP_HP_BUFFER_SIZE wnd0 : org = HP_SRAM_WIN0_BASE, len = HP_SRAM_WIN0_SIZE @@ -128,7 +125,6 @@ PHDRS vector_double_lit_phdr PT_LOAD; vector_double_text_phdr PT_LOAD; sof_fw_phdr PT_LOAD; - buffer_hp_heap_phdr PT_LOAD; wnd0_phdr PT_LOAD; wnd1_phdr PT_LOAD; wnd2_phdr PT_LOAD; @@ -157,14 +153,6 @@ SECTIONS _MemoryExceptionVector_text_end = ABSOLUTE(.); } >vector_memory_text :vector_memory_text_phdr - .buffer_hp_heap (NOLOAD) : ALIGN(8) - { - . = ALIGN (32); - _buffer_hp_heap_start = ABSOLUTE(.); - . = . + HEAP_HP_BUFFER_SIZE; - _buffer_hp_heap_end = ABSOLUTE(.); - } >buffer_hp_heap :buffer_hp_heap_phdr - .wnd0 (NOLOAD) : ALIGN(8) { . = ALIGN (32); diff --git a/src/platform/icelake/include/platform/lib/memory.h b/src/platform/icelake/include/platform/lib/memory.h index 072831b7da1e..047afc00febe 100644 --- a/src/platform/icelake/include/platform/lib/memory.h +++ b/src/platform/icelake/include/platform/lib/memory.h @@ -143,8 +143,6 @@ * +------------------+-------------------------+-----------------------------+ * | SRAM_TRACE_BASE | Trace Buffer W3 | SRAM_TRACE_SIZE | * +------------------+-------------------------+-----------------------------+ - * | HP_SRAM_BASE | DMA | HEAP_HP_BUFFER_SIZE | - * +------------------+-------------------------+-----------------------------+ * | SOF_FW_START | text | | * | | data | | * | | BSS | | @@ -217,14 +215,8 @@ #define HP_SRAM_WIN3_BASE SRAM_TRACE_BASE #define HP_SRAM_WIN3_SIZE SRAM_TRACE_SIZE -#define HEAP_HP_BUFFER_BASE (SRAM_TRACE_BASE + SRAM_TRACE_SIZE) -#define HEAP_HP_BUFFER_SIZE 0x20000 -#define HEAP_HP_BUFFER_BLOCK_SIZE 0x180 -#define HEAP_HP_BUFFER_COUNT \ - (HEAP_HP_BUFFER_SIZE / HEAP_HP_BUFFER_BLOCK_SIZE) - /* HP SRAM Base */ -#define HP_SRAM_VECBASE_RESET (HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE) +#define HP_SRAM_VECBASE_RESET (SRAM_TRACE_BASE + SRAM_TRACE_SIZE) /* text and data share the same HP L2 SRAM on Icelake */ #define SOF_FW_START (HP_SRAM_VECBASE_RESET + 0x400) @@ -259,7 +251,7 @@ HEAP_RT_COUNT256 * 256 + HEAP_RT_COUNT512 * 512 + \ HEAP_RT_COUNT1024 * 1024) -#define HEAP_BUFFER_SIZE 0xF000 +#define HEAP_BUFFER_SIZE 0x20000 #define HEAP_BUFFER_BLOCK_SIZE 0x180 #define HEAP_BUFFER_COUNT (HEAP_BUFFER_SIZE / HEAP_BUFFER_BLOCK_SIZE) @@ -354,7 +346,7 @@ #define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_RUNTIME 1 -#define PLATFORM_HEAP_BUFFER 3 +#define PLATFORM_HEAP_BUFFER 2 /* Stack configuration */ #define SOF_LP_STACK_SIZE 0x1000 @@ -400,7 +392,8 @@ #define IMR_BOOT_LDR_BSS_SIZE 0x10000 /* Temporary stack place for boot_ldr */ -#define BOOT_LDR_STACK_BASE HEAP_HP_BUFFER_BASE +#define BOOT_LDR_STACK_BASE (HP_SRAM_BASE + HP_SRAM_SIZE - \ + SOF_STACK_TOTAL_SIZE) #define BOOT_LDR_STACK_SIZE SOF_STACK_TOTAL_SIZE #define uncache_to_cache(address) \ diff --git a/src/platform/intel/cavs/lib/memory.c b/src/platform/intel/cavs/lib/memory.c index 23a027642a92..8abcbfc6e2ba 100644 --- a/src/platform/intel/cavs/lib/memory.c +++ b/src/platform/intel/cavs/lib/memory.c @@ -84,8 +84,6 @@ static struct block_map rt_heap_map[] = { /* Heap blocks for buffers */ static struct block_hdr buf_block[HEAP_BUFFER_COUNT] __aligned(PLATFORM_DCACHE_ALIGN); -static struct block_hdr - hp_buf_block[HEAP_HP_BUFFER_COUNT] __aligned(PLATFORM_DCACHE_ALIGN); static struct block_hdr lp_buf_block[HEAP_LP_BUFFER_COUNT] __aligned(PLATFORM_DCACHE_ALIGN); @@ -94,11 +92,6 @@ static struct block_map buf_heap_map[] = { BLOCK_DEF(HEAP_BUFFER_BLOCK_SIZE, HEAP_BUFFER_COUNT, buf_block), }; -static struct block_map hp_buf_heap_map[] = { - BLOCK_DEF(HEAP_HP_BUFFER_BLOCK_SIZE, HEAP_HP_BUFFER_COUNT, - hp_buf_block), -}; - static struct block_map lp_buf_heap_map[] = { BLOCK_DEF(HEAP_LP_BUFFER_BLOCK_SIZE, HEAP_LP_BUFFER_COUNT, lp_buf_block), @@ -165,29 +158,20 @@ void platform_init_memmap(void) memmap.buffer[0].heap = (uintptr_t)&_buffer_heap; memmap.buffer[0].size = HEAP_BUFFER_SIZE; memmap.buffer[0].info.free = HEAP_BUFFER_SIZE; - memmap.buffer[0].caps = SOF_MEM_CAPS_RAM | SOF_MEM_CAPS_EXT | - SOF_MEM_CAPS_CACHE; - - /* heap hp buffer init */ - memmap.buffer[1].blocks = ARRAY_SIZE(hp_buf_heap_map); - memmap.buffer[1].map = hp_buf_heap_map; - memmap.buffer[1].heap = HEAP_HP_BUFFER_BASE; - memmap.buffer[1].size = HEAP_HP_BUFFER_SIZE; - memmap.buffer[1].info.free = HEAP_HP_BUFFER_SIZE; - memmap.buffer[1].caps = SOF_MEM_CAPS_RAM | SOF_MEM_CAPS_HP | + memmap.buffer[0].caps = SOF_MEM_CAPS_RAM | SOF_MEM_CAPS_HP | SOF_MEM_CAPS_CACHE | SOF_MEM_CAPS_DMA; /* heap lp buffer init */ - memmap.buffer[2].blocks = ARRAY_SIZE(lp_buf_heap_map); - memmap.buffer[2].map = lp_buf_heap_map; - memmap.buffer[2].heap = HEAP_LP_BUFFER_BASE; - memmap.buffer[2].size = HEAP_LP_BUFFER_SIZE; - memmap.buffer[2].info.free = HEAP_LP_BUFFER_SIZE; - memmap.buffer[2].caps = SOF_MEM_CAPS_RAM | SOF_MEM_CAPS_LP | + memmap.buffer[1].blocks = ARRAY_SIZE(lp_buf_heap_map); + memmap.buffer[1].map = lp_buf_heap_map; + memmap.buffer[1].heap = HEAP_LP_BUFFER_BASE; + memmap.buffer[1].size = HEAP_LP_BUFFER_SIZE; + memmap.buffer[1].info.free = HEAP_LP_BUFFER_SIZE; + memmap.buffer[1].caps = SOF_MEM_CAPS_RAM | SOF_MEM_CAPS_LP | SOF_MEM_CAPS_CACHE | SOF_MEM_CAPS_DMA; /* .total init */ memmap.total.free = HEAP_SYSTEM_T_SIZE + HEAP_SYS_RUNTIME_T_SIZE + - HEAP_RUNTIME_SIZE + HEAP_BUFFER_SIZE + HEAP_HP_BUFFER_SIZE + + HEAP_RUNTIME_SIZE + HEAP_BUFFER_SIZE + HEAP_LP_BUFFER_SIZE; } diff --git a/src/platform/suecreek/include/platform/lib/memory.h b/src/platform/suecreek/include/platform/lib/memory.h index 88d605984122..523d7c79ca20 100644 --- a/src/platform/suecreek/include/platform/lib/memory.h +++ b/src/platform/suecreek/include/platform/lib/memory.h @@ -249,7 +249,7 @@ HEAP_RT_COUNT256 * 256 + HEAP_RT_COUNT512 * 512 + \ HEAP_RT_COUNT1024 * 1024) -#define HEAP_BUFFER_SIZE 0xF000 +#define HEAP_BUFFER_SIZE 0x10000 #define HEAP_BUFFER_BLOCK_SIZE 0x180 #define HEAP_BUFFER_COUNT (HEAP_BUFFER_SIZE / HEAP_BUFFER_BLOCK_SIZE) @@ -280,12 +280,6 @@ SRAM_BANK_SIZE) #define SOF_CORE_S_T_SIZE ((PLATFORM_CORE_COUNT - 1) * SOF_CORE_S_SIZE) -#define HEAP_HP_BUFFER_COUNT 0 -#define HEAP_HP_BUFFER_BLOCK_SIZE 0 -#define HEAP_HP_BUFFER_BASE 0 -#define HEAP_HP_BUFFER_SIZE 0 - - /* * The LP SRAM Heap and Stack on Suecreek are organised like this :- * @@ -353,7 +347,7 @@ #define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_RUNTIME 1 -#define PLATFORM_HEAP_BUFFER 3 +#define PLATFORM_HEAP_BUFFER 2 /* Stack configuration */ #define SOF_LP_STACK_SIZE 0x1000 @@ -402,7 +396,8 @@ #define BOOT_LDR_BSS_SIZE 0x100 /* Temporary stack place for boot_ldr */ -#define BOOT_LDR_STACK_BASE HEAP_HP_BUFFER_BASE +#define BOOT_LDR_STACK_BASE (HP_SRAM_BASE + HP_SRAM_SIZE - \ + SOF_STACK_TOTAL_SIZE) #define BOOT_LDR_STACK_SIZE SOF_STACK_TOTAL_SIZE /* code loader entry point for base fw */ diff --git a/src/platform/suecreek/suecreek.x.in b/src/platform/suecreek/suecreek.x.in index c51d494c340d..7e297087561d 100644 --- a/src/platform/suecreek/suecreek.x.in +++ b/src/platform/suecreek/suecreek.x.in @@ -87,9 +87,6 @@ MEMORY sof_fw : org = SOF_FW_BASE, len = SOF_FW_MAX_SIZE, - buffer_hp_heap : - org = HEAP_HP_BUFFER_BASE, - len = HEAP_HP_BUFFER_SIZE static_log_entries_seg (!ari) : org = LOG_ENTRY_ELF_BASE, len = LOG_ENTRY_ELF_SIZE @@ -121,7 +118,6 @@ PHDRS vector_double_lit_phdr PT_LOAD; vector_double_text_phdr PT_LOAD; sof_fw_phdr PT_LOAD; - buffer_hp_heap_phdr PT_LOAD; static_log_entries_phdr PT_NOTE; } diff --git a/src/platform/tigerlake/include/platform/lib/memory.h b/src/platform/tigerlake/include/platform/lib/memory.h index 75fb4f42d3a5..5803be7c0277 100644 --- a/src/platform/tigerlake/include/platform/lib/memory.h +++ b/src/platform/tigerlake/include/platform/lib/memory.h @@ -357,7 +357,7 @@ #define PLATFORM_HEAP_SYSTEM PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_SYSTEM_RUNTIME PLATFORM_CORE_COUNT /* one per core */ #define PLATFORM_HEAP_RUNTIME 1 -#define PLATFORM_HEAP_BUFFER 3 +#define PLATFORM_HEAP_BUFFER 2 /* Stack configuration */ #define SOF_LP_STACK_SIZE 0x1000 From aac58bc112f84e02af00c3c261a3f7bf6c2cd3c5 Mon Sep 17 00:00:00 2001 From: Jakub Dabek Date: Mon, 14 Oct 2019 16:18:14 +0200 Subject: [PATCH 2/2] buffer: Add alignment setting for DMA buffers. Add seeting of alignment for DMA buffer that is required by Hardware configuration. Signed-off-by: Jakub Dabek --- src/audio/host.c | 21 +++++++++++++++++++++ src/drivers/dw/dma.c | 3 +++ src/drivers/generic/dummy-dma.c | 3 +++ src/drivers/imx/edma.c | 6 +++++- src/drivers/intel/cavs/hda-dma.c | 4 ++++ src/include/sof/lib/dma.h | 5 +++-- 6 files changed, 39 insertions(+), 3 deletions(-) diff --git a/src/audio/host.c b/src/audio/host.c index b67ede29a12d..4ae6ba86d2be 100644 --- a/src/audio/host.c +++ b/src/audio/host.c @@ -518,6 +518,23 @@ static void host_buffer_cb(void *data, uint32_t bytes) } while (hd->split_value); } +static void realign_buffer(struct host_data *hd) +{ + uint32_t buffer_alignment; + + dma_get_attribute(hd->dma, DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT, + &buffer_alignment); + + if ((uintptr_t)hd->dma_buffer->addr % buffer_alignment) { + hd->dma_buffer->addr = + rbrealloc_align(hd->dma_buffer->addr, RZONE_BUFFER, + SOF_MEM_CAPS_DMA, + hd->dma_buffer->alloc_size, + buffer_alignment); + buffer_init(hd->dma_buffer, hd->dma_buffer->alloc_size); + } +} + /* configure the DMA params and descriptors for host buffer IO */ static int host_params(struct comp_dev *dev) { @@ -548,6 +565,8 @@ static int host_params(struct comp_dev *dev) hd->dma_buffer = list_first_item(&dev->bsink_list, struct comp_buffer, source_list); + realign_buffer(hd); + /* set callback on buffer consume */ buffer_set_cb(hd->dma_buffer, &host_buffer_cb, dev, BUFF_CB_TYPE_CONSUME); @@ -570,6 +589,8 @@ static int host_params(struct comp_dev *dev) hd->dma_buffer = list_first_item(&dev->bsource_list, struct comp_buffer, sink_list); + realign_buffer(hd); + /* set callback on buffer produce */ buffer_set_cb(hd->dma_buffer, &host_buffer_cb, dev, BUFF_CB_TYPE_PRODUCE); diff --git a/src/drivers/dw/dma.c b/src/drivers/dw/dma.c index 540476b93045..c1955c168f1c 100644 --- a/src/drivers/dw/dma.c +++ b/src/drivers/dw/dma.c @@ -1079,6 +1079,9 @@ static int dw_dma_get_attribute(struct dma *dma, uint32_t type, case DMA_ATTR_COPY_ALIGNMENT: *value = DW_DMA_COPY_ALIGNMENT; break; + case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT: + *value = PLATFORM_DCACHE_ALIGN; + break; default: ret = -EINVAL; break; diff --git a/src/drivers/generic/dummy-dma.c b/src/drivers/generic/dummy-dma.c index f22b59deefad..42cca823006f 100644 --- a/src/drivers/generic/dummy-dma.c +++ b/src/drivers/generic/dummy-dma.c @@ -523,6 +523,9 @@ static int dummy_dma_get_attribute(struct dma *dma, uint32_t type, case DMA_ATTR_COPY_ALIGNMENT: *value = sizeof(void *); break; + case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT: + *value = PLATFORM_DCACHE_ALIGN; + break; default: return -ENOENT; /* Attribute not found */ } diff --git a/src/drivers/imx/edma.c b/src/drivers/imx/edma.c index 3acec254cdf4..9b34569903ec 100644 --- a/src/drivers/imx/edma.c +++ b/src/drivers/imx/edma.c @@ -471,10 +471,14 @@ static int edma_get_attribute(struct dma *dma, uint32_t type, uint32_t *value) * size of the elementary copy). */ *value = 4; - return 0; + break; + case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT: + *value = PLATFORM_DCACHE_ALIGN; + break; default: return -ENOENT; /* Attribute not found */ } + return 0; } static int edma_get_data_size(struct dma_chan_data *channel, diff --git a/src/drivers/intel/cavs/hda-dma.c b/src/drivers/intel/cavs/hda-dma.c index d09c42d314cf..759cba9baddb 100644 --- a/src/drivers/intel/cavs/hda-dma.c +++ b/src/drivers/intel/cavs/hda-dma.c @@ -65,6 +65,7 @@ /* DGMBS align value */ #define HDA_DMA_BUFFER_ALIGNMENT 0x20 #define HDA_DMA_COPY_ALIGNMENT 0x20 +#define HDA_DMA_BUFFER_ADDRESS_ALIGNMENT 0x80 /* * DMA Pointer Trace @@ -876,6 +877,9 @@ static int hda_dma_get_attribute(struct dma *dma, uint32_t type, case DMA_ATTR_COPY_ALIGNMENT: *value = HDA_DMA_COPY_ALIGNMENT; break; + case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT: + *value = HDA_DMA_BUFFER_ADDRESS_ALIGNMENT; + break; default: ret = -EINVAL; break; diff --git a/src/include/sof/lib/dma.h b/src/include/sof/lib/dma.h index b627a60989ba..c192887c7f73 100644 --- a/src/include/sof/lib/dma.h +++ b/src/include/sof/lib/dma.h @@ -88,8 +88,9 @@ enum dma_irq_cmd { #define DMA_CORE_INVALID 0xFFFFFFFF /* DMA attributes */ -#define DMA_ATTR_BUFFER_ALIGNMENT 0 -#define DMA_ATTR_COPY_ALIGNMENT 1 +#define DMA_ATTR_BUFFER_ALIGNMENT 0 +#define DMA_ATTR_COPY_ALIGNMENT 1 +#define DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT 2 struct dma;