diff --git a/Kconfig b/Kconfig
index 1f42301fe457..ae803ac18c8a 100644
--- a/Kconfig
+++ b/Kconfig
@@ -20,9 +20,18 @@ config HP_MEMORY_BANKS
 config LP_MEMORY_BANKS
 	int "LP memory banks count"
 	default 1
+	depends on LP_SRAM
 	help
 	  Available memory banks count for Low Power memory
 
+config LP_SRAM
+	bool "Enable LPSRAM memory"
+	default n
+	help
+	  Turn ON/OFF LPSRAM bank/s. This provides an option to enable an LPSRAM
+	  memory for specific platform. Until this options is enabled firmware will
+	  not enable any of LPSRAM memory banks.
+
 endmenu
 
 config HOST_PTABLE
diff --git a/src/arch/xtensa/boot_loader.c b/src/arch/xtensa/boot_loader.c
index 8022479750e9..fb0e93dc9150 100644
--- a/src/arch/xtensa/boot_loader.c
+++ b/src/arch/xtensa/boot_loader.c
@@ -197,7 +197,7 @@ static uint32_t hp_sram_init(void)
 
 #endif
 
-#if CONFIG_APOLLOLAKE
+#if CONFIG_LP_SRAM
 static int32_t lp_sram_init(void)
 {
 	uint32_t status;
@@ -211,8 +211,8 @@ static int32_t lp_sram_init(void)
 	/* add some delay before writing power registers */
 	idelay(delay_count);
 
-	lspgctl_value = shim_read(LSPGCTL);
-	shim_write(LSPGCTL, lspgctl_value & !LPSRAM_MASK(0));
+	lspgctl_value = shim_read(SHIM_LSPGCTL);
+	shim_write(SHIM_LSPGCTL, lspgctl_value & !LPSRAM_MASK(0));
 
 	/* add some delay before checking the status */
 	idelay(delay_count);
@@ -251,7 +251,7 @@ void boot_master_core(void)
 		return;
 	}
 
-#if CONFIG_APOLLOLAKE
+#if CONFIG_LP_SRAM
 	/* init the LPSRAM */
 	platform_trace_point(TRACE_BOOT_LDR_LPSRAM);
 
diff --git a/src/arch/xtensa/configs/apollolake_defconfig b/src/arch/xtensa/configs/apollolake_defconfig
index 7c831628e0a0..fc791d7abf65 100644
--- a/src/arch/xtensa/configs/apollolake_defconfig
+++ b/src/arch/xtensa/configs/apollolake_defconfig
@@ -3,3 +3,4 @@ CONFIG_CAVS_DMIC=y
 CONFIG_CAVS_SSP=y
 CONFIG_LP_MEMORY_BANKS=2
 CONFIG_HP_MEMORY_BANKS=8
+CONFIG_LP_SRAM=y
diff --git a/src/arch/xtensa/configs/cannonlake_defconfig b/src/arch/xtensa/configs/cannonlake_defconfig
index 384cd78de6de..a27d5ec06587 100644
--- a/src/arch/xtensa/configs/cannonlake_defconfig
+++ b/src/arch/xtensa/configs/cannonlake_defconfig
@@ -4,3 +4,4 @@ CONFIG_CAVS_SSP=y
 CONFIG_CORE_COUNT=4
 CONFIG_LP_MEMORY_BANKS=1
 CONFIG_HP_MEMORY_BANKS=47
+CONFIG_LP_SRAM=y
diff --git a/src/platform/apollolake/include/platform/lib/memory.h b/src/platform/apollolake/include/platform/lib/memory.h
index 1e3d3e3d98a8..fde50284160c 100644
--- a/src/platform/apollolake/include/platform/lib/memory.h
+++ b/src/platform/apollolake/include/platform/lib/memory.h
@@ -366,8 +366,13 @@
 #define HEAP_LP_BUFFER_SIZE LP_SRAM_SIZE
 
 #define HEAP_LP_BUFFER_BLOCK_SIZE	0x180
+
+#if CONFIG_LP_MEMORY_BANKS
 #define HEAP_LP_BUFFER_COUNT \
 	(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
+#else
+#define HEAP_LP_BUFFER_COUNT 0
+#endif
 
 #define PLATFORM_HEAP_SYSTEM		PLATFORM_CORE_COUNT /* one per core */
 #define PLATFORM_HEAP_SYSTEM_RUNTIME	PLATFORM_CORE_COUNT /* one per core */
diff --git a/src/platform/cannonlake/include/platform/lib/memory.h b/src/platform/cannonlake/include/platform/lib/memory.h
index 5b31bf731710..7e5c21b0345c 100644
--- a/src/platform/cannonlake/include/platform/lib/memory.h
+++ b/src/platform/cannonlake/include/platform/lib/memory.h
@@ -340,15 +340,17 @@
 	HEAP_RT_LP_COUNT128 * 128 + HEAP_RT_LP_COUNT256 * 256 + \
 	HEAP_RT_LP_COUNT512 * 512 + HEAP_RT_LP_COUNT1024 * 1024)
 
-#define HEAP_LP_BUFFER_BASE \
-	(HEAP_LP_RUNTIME_BASE + HEAP_LP_RUNTIME_SIZE)
-#define HEAP_LP_BUFFER_SIZE \
-	(LP_SRAM_SIZE - HEAP_LP_RUNTIME_SIZE - SOF_LP_STACK_SIZE - \
-	HEAP_LP_SYSTEM_SIZE)
+#define HEAP_LP_BUFFER_BASE LP_SRAM_BASE
+#define HEAP_LP_BUFFER_SIZE LP_SRAM_SIZE
 
 #define HEAP_LP_BUFFER_BLOCK_SIZE		0x180
+
+#if CONFIG_LP_MEMORY_BANKS
 #define HEAP_LP_BUFFER_COUNT \
 	(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
+#else
+#define HEAP_LP_BUFFER_COUNT 0
+#endif
 
 #define PLATFORM_HEAP_SYSTEM		PLATFORM_CORE_COUNT /* one per core */
 #define PLATFORM_HEAP_SYSTEM_RUNTIME	PLATFORM_CORE_COUNT /* one per core */
diff --git a/src/platform/cannonlake/include/platform/lib/shim.h b/src/platform/cannonlake/include/platform/lib/shim.h
index e114684e270b..56664d525163 100644
--- a/src/platform/cannonlake/include/platform/lib/shim.h
+++ b/src/platform/cannonlake/include/platform/lib/shim.h
@@ -178,6 +178,7 @@
 
 #define SHIM_PWRSTS		0x92
 #define SHIM_LPSCTL		0x94
+#define SHIM_LSPGCTL		0x50
 
 /** \brief GPDMA shim registers Control */
 #define SHIM_GPDMA_BASE_OFFSET	0x6500
diff --git a/src/platform/icelake/include/platform/lib/memory.h b/src/platform/icelake/include/platform/lib/memory.h
index 0e5c8a181313..30b81467c4df 100644
--- a/src/platform/icelake/include/platform/lib/memory.h
+++ b/src/platform/icelake/include/platform/lib/memory.h
@@ -340,8 +340,13 @@
 	HEAP_LP_SYSTEM_SIZE)
 
 #define HEAP_LP_BUFFER_BLOCK_SIZE		0x180
+
+#if CONFIG_LP_MEMORY_BANKS
 #define HEAP_LP_BUFFER_COUNT \
 	(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
+#else
+#define	HEAP_LP_BUFFER_COUNT 0
+#endif
 
 #define PLATFORM_HEAP_SYSTEM		PLATFORM_CORE_COUNT /* one per core */
 #define PLATFORM_HEAP_SYSTEM_RUNTIME	PLATFORM_CORE_COUNT /* one per core */
diff --git a/src/platform/intel/cavs/include/cavs/lib/memory.h b/src/platform/intel/cavs/include/cavs/lib/memory.h
index 405a15e83e8d..26e5e40064ba 100644
--- a/src/platform/intel/cavs/include/cavs/lib/memory.h
+++ b/src/platform/intel/cavs/include/cavs/lib/memory.h
@@ -19,14 +19,22 @@
 
 #define EBB_SEGMENT_SIZE		EBB_BANKS_IN_SEGMENT
 
+#if CONFIG_LP_MEMORY_BANKS
 #define PLATFORM_LPSRAM_EBB_COUNT	CONFIG_LP_MEMORY_BANKS
+#else
+#define PLATFORM_LPSRAM_EBB_COUNT	0
+#endif
 
 #define PLATFORM_HPSRAM_EBB_COUNT	CONFIG_HP_MEMORY_BANKS
 
 #define MAX_MEMORY_SEGMENTS		PLATFORM_HPSRAM_SEGMENTS
 
+#if CONFIG_LP_MEMORY_BANKS
 #define LP_SRAM_SIZE \
 	(CONFIG_LP_MEMORY_BANKS * SRAM_BANK_SIZE)
+#else
+#define LP_SRAM_SIZE 0
+#endif
 
 #define HP_SRAM_SIZE \
 	(CONFIG_HP_MEMORY_BANKS * SRAM_BANK_SIZE)
diff --git a/src/platform/suecreek/include/platform/lib/memory.h b/src/platform/suecreek/include/platform/lib/memory.h
index 1458cc643455..952cc26266f1 100644
--- a/src/platform/suecreek/include/platform/lib/memory.h
+++ b/src/platform/suecreek/include/platform/lib/memory.h
@@ -341,8 +341,13 @@
 	HEAP_LP_SYSTEM_SIZE)
 
 #define HEAP_LP_BUFFER_BLOCK_SIZE		0x180
+
+#if CONFIG_LP_MEMORY_BANKS
 #define HEAP_LP_BUFFER_COUNT \
 	(HEAP_LP_BUFFER_SIZE / HEAP_LP_BUFFER_BLOCK_SIZE)
+#else
+#define HEAP_LP_BUFFER_COUNT 0
+#endif
 
 
 #define PLATFORM_HEAP_SYSTEM		PLATFORM_CORE_COUNT /* one per core */
diff --git a/test/cmocka/src/lib/alloc/alloc.c b/test/cmocka/src/lib/alloc/alloc.c
index 8e05dadbe951..a628102dfde1 100644
--- a/test/cmocka/src/lib/alloc/alloc.c
+++ b/test/cmocka/src/lib/alloc/alloc.c
@@ -290,6 +290,7 @@ static void test_lib_rballoc_filling_preceding_heaps(struct test_case *tc)
 	size_t first_heap_size = HEAP_BUFFER_SIZE - tc->alloc_size * 8;
 	size_t second_heap_size = HEAP_HP_BUFFER_SIZE - tc->alloc_size;
 	size_t third_heap_size = 2048;
+
 	int *first_mem = rballoc(tc->alloc_zone, SOF_MEM_CAPS_RAM,
 				 first_heap_size);
 	int *second_mem = rballoc(tc->alloc_zone, SOF_MEM_CAPS_RAM,
@@ -299,8 +300,9 @@ static void test_lib_rballoc_filling_preceding_heaps(struct test_case *tc)
 
 	assert_ptr_equal(first_mem, (unsigned int)&_buffer_heap);
 	assert_ptr_equal(second_mem, HEAP_HP_BUFFER_BASE);
+#if CONFIG_LP_SRAM
 	assert_ptr_equal(third_mem, HEAP_LP_BUFFER_BASE);
-
+#endif
 	rfree(first_mem);
 	rfree(second_mem);
 	rfree(third_mem);