From 0467895fd64997e265239ba2662660139f9efbc0 Mon Sep 17 00:00:00 2001 From: Keyon Jie Date: Thu, 10 Jun 2021 17:52:53 +0800 Subject: [PATCH 1/5] ASoC: SOF: add _D3_PERSISTENT flag to fw_ready message Add a bit definition to the fw_ready message, to denote if the FW supports the IMR (Isolated Memory Region) restoring feature. If the bit is set, the driver can skip downloading the firmware again during system resume or runtime resume. Bump the ABI version to 3.19 to make it aligned with FW side. Signed-off-by: Keyon Jie --- include/sound/sof/info.h | 1 + include/uapi/sound/sof/abi.h | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/include/sound/sof/info.h b/include/sound/sof/info.h index 0b7101aef596d3..65e86e4e9fd8e7 100644 --- a/include/sound/sof/info.h +++ b/include/sound/sof/info.h @@ -25,6 +25,7 @@ #define SOF_IPC_INFO_LOCKS BIT(1) #define SOF_IPC_INFO_LOCKSV BIT(2) #define SOF_IPC_INFO_GDB BIT(3) +#define SOF_IPC_INFO_D3_PERSISTENT BIT(4) /* extended data types that can be appended onto end of sof_ipc_fw_ready */ enum sof_ipc_ext_data { diff --git a/include/uapi/sound/sof/abi.h b/include/uapi/sound/sof/abi.h index fe2cfae94b45fd..f4232d289a22b5 100644 --- a/include/uapi/sound/sof/abi.h +++ b/include/uapi/sound/sof/abi.h @@ -26,7 +26,7 @@ /* SOF ABI version major, minor and patch numbers */ #define SOF_ABI_MAJOR 3 -#define SOF_ABI_MINOR 18 +#define SOF_ABI_MINOR 19 #define SOF_ABI_PATCH 0 /* SOF ABI version number. Format within 32bit word is MMmmmppp */ From 4c340400a7c72d189731f6231796391bcd7228f9 Mon Sep 17 00:00:00 2001 From: Pierre-Louis Bossart Date: Thu, 16 Dec 2021 12:27:20 -0600 Subject: [PATCH 2/5] ASoC: SOF: Intel: use inclusive language for SSP clocks We introduced provider/consumer terms, and CBP_CFP acronyms for codec drivers, let's use them as well in SOF. Signed-off-by: Pierre-Louis Bossart --- sound/soc/sof/intel/hda-loader.c | 6 +++--- sound/soc/sof/intel/hda.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c index 1eba2e1f527c45..fc6f7b5bf2399b 100644 --- a/sound/soc/sof/intel/hda-loader.c +++ b/sound/soc/sof/intel/hda-loader.c @@ -101,14 +101,14 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag) goto err; } - /* DSP is powered up, set all SSPs to slave mode */ + /* DSP is powered up, set all SSPs to clock consumer/codec provider mode */ for (i = 0; i < chip->ssp_count; i++) { snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, chip->ssp_base_offset + i * SSP_DEV_MEM_SIZE + SSP_SSC1_OFFSET, - SSP_SET_SLAVE, - SSP_SET_SLAVE); + SSP_SET_CBP_CFP, + SSP_SET_CBP_CFP); } /* step 2: purge FW request */ diff --git a/sound/soc/sof/intel/hda.h b/sound/soc/sof/intel/hda.h index 3526e6970a64e1..13b509c9f48143 100644 --- a/sound/soc/sof/intel/hda.h +++ b/sound/soc/sof/intel/hda.h @@ -378,9 +378,9 @@ /* SSP Registers */ #define SSP_SSC1_OFFSET 0x4 -#define SSP_SET_SCLK_SLAVE BIT(25) -#define SSP_SET_SFRM_SLAVE BIT(24) -#define SSP_SET_SLAVE (SSP_SET_SCLK_SLAVE | SSP_SET_SFRM_SLAVE) +#define SSP_SET_SCLK_CONSUMER BIT(25) +#define SSP_SET_SFRM_CONSUMER BIT(24) +#define SSP_SET_CBP_CFP (SSP_SET_SCLK_CONSUMER | SSP_SET_SFRM_CONSUMER) #define HDA_IDISP_ADDR 2 #define HDA_IDISP_CODEC(x) ((x) & BIT(HDA_IDISP_ADDR)) From d451ca7925fd2d53977a1422dc523ea1604f19e2 Mon Sep 17 00:00:00 2001 From: Keyon Jie Date: Thu, 17 Jun 2021 10:41:48 +0800 Subject: [PATCH 3/5] ASoC: SOF: Intel: hda-loader: add SSP helper Move the SSP clock configuration to the hda_set_ssp_cbp_cfp() helper, to be used in follow-up patches Signed-off-by: Keyon Jie Signed-off-by: Pierre-Louis Bossart --- sound/soc/sof/intel/hda-loader.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c index fc6f7b5bf2399b..fe1c7267a58784 100644 --- a/sound/soc/sof/intel/hda-loader.c +++ b/sound/soc/sof/intel/hda-loader.c @@ -25,6 +25,23 @@ #define HDA_CL_STREAM_FORMAT 0x40 +static void hda_ssp_set_cbp_cfp(struct snd_sof_dev *sdev) +{ + struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; + const struct sof_intel_dsp_desc *chip = hda->desc; + int i; + + /* DSP is powered up, set all SSPs to clock consumer/codec provider mode */ + for (i = 0; i < chip->ssp_count; i++) { + snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, + chip->ssp_base_offset + + i * SSP_DEV_MEM_SIZE + + SSP_SSC1_OFFSET, + SSP_SET_CBP_CFP, + SSP_SET_CBP_CFP); + } +} + static struct hdac_ext_stream *cl_stream_prepare(struct snd_sof_dev *sdev, unsigned int format, unsigned int size, struct snd_dma_buffer *dmab, int direction) @@ -91,7 +108,6 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag) char *dump_msg; u32 flags, j; int ret; - int i; /* step 1: power up corex */ ret = hda_dsp_enable_core(sdev, chip->host_managed_cores_mask); @@ -101,15 +117,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag) goto err; } - /* DSP is powered up, set all SSPs to clock consumer/codec provider mode */ - for (i = 0; i < chip->ssp_count; i++) { - snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, - chip->ssp_base_offset - + i * SSP_DEV_MEM_SIZE - + SSP_SSC1_OFFSET, - SSP_SET_CBP_CFP, - SSP_SET_CBP_CFP); - } + hda_ssp_set_cbp_cfp(sdev); /* step 2: purge FW request */ snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, From 541f223046926ef63aeab16d49f85be24841a856 Mon Sep 17 00:00:00 2001 From: Keyon Jie Date: Thu, 10 Jun 2021 18:33:43 +0800 Subject: [PATCH 4/5] ASoC: SOF: Intel: hda-loader: add IMR restore support If the firmware declares the IMR restore feature, we only need to do a simple powering up to resume from D3, no firmware re-downloading needed - the context is saved/restored to/from IMR without needing driver support. Add a hda_dsp_boot_imr() helper for this simple DSP reboot, and use it when it is available. Signed-off-by: Keyon Jie Signed-off-by: Pierre-Louis Bossart --- sound/soc/sof/intel/hda-loader.c | 38 ++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c index fe1c7267a58784..a3314fbb84fd06 100644 --- a/sound/soc/sof/intel/hda-loader.c +++ b/sound/soc/sof/intel/hda-loader.c @@ -354,6 +354,38 @@ int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev) return ret; } +static int hda_dsp_boot_imr(struct snd_sof_dev *sdev) +{ + struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; + const struct sof_intel_dsp_desc *chip = hda->desc; + unsigned long mask; + u32 j; + int ret; + + /* power up & unstall/run the cores to run the firmware */ + ret = hda_dsp_enable_core(sdev, chip->init_core_mask); + if (ret < 0) { + dev_err(sdev->dev, "dsp core start failed %d\n", ret); + return -EIO; + } + + /* set enabled cores mask and increment ref count for cores in init_core_mask */ + sdev->enabled_cores_mask |= chip->init_core_mask; + mask = sdev->enabled_cores_mask; + for_each_set_bit(j, &mask, SOF_MAX_DSP_NUM_CORES) + sdev->dsp_core_ref_count[j]++; + + hda_ssp_set_cbp_cfp(sdev); + + /* enable IPC interrupts */ + hda_dsp_ipc_int_enable(sdev); + + /* process wakes */ + hda_sdw_process_wakeen(sdev); + + return ret; +} + int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) { struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; @@ -365,6 +397,12 @@ int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) struct snd_dma_buffer dmab; int ret, ret1, i; + if ((sdev->fw_ready.flags & SOF_IPC_INFO_D3_PERSISTENT) && + !sdev->first_boot) { + dev_dbg(sdev->dev, "IMR restore supported, booting from IMR directly\n"); + return hda_dsp_boot_imr(sdev); + } + chip_info = desc->chip_info; if (plat_data->fw->size <= plat_data->fw_offset) { From 7767427fc0a654e9e6f0000f93454b213de99c66 Mon Sep 17 00:00:00 2001 From: Keyon Jie Date: Wed, 16 Jun 2021 14:00:22 +0800 Subject: [PATCH 5/5] ASoC: SOF: add flag to disable IMR restore to sof_debug Add flag _IGNORE_D3_PERSISTENT to disable IMR restore feature to the sof_debug module parameter. The IMR restore feature will be enabled for all Intel cAVS platforms by default, but setting the flag _IGNORE_D3_PERSISTENT can help to disable the feature for debug purpose, to rule out any possible regression introduced by the change of not re-downloading firmware to the DSP at resuming from suspended state. Signed-off-by: Keyon Jie Signed-off-by: Pierre-Louis Bossart --- sound/soc/sof/intel/hda-loader.c | 2 ++ sound/soc/sof/sof-priv.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c index a3314fbb84fd06..7f2f7dbaadfae9 100644 --- a/sound/soc/sof/intel/hda-loader.c +++ b/sound/soc/sof/intel/hda-loader.c @@ -21,6 +21,7 @@ #include #include "ext_manifest.h" #include "../ops.h" +#include "../sof-priv.h" #include "hda.h" #define HDA_CL_STREAM_FORMAT 0x40 @@ -398,6 +399,7 @@ int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) int ret, ret1, i; if ((sdev->fw_ready.flags & SOF_IPC_INFO_D3_PERSISTENT) && + !(sof_debug_check_flag(SOF_DBG_IGNORE_D3_PERSISTENT)) && !sdev->first_boot) { dev_dbg(sdev->dev, "IMR restore supported, booting from IMR directly\n"); return hda_dsp_boot_imr(sdev); diff --git a/sound/soc/sof/sof-priv.h b/sound/soc/sof/sof-priv.h index 3167164cff4e62..f54777e313b5c1 100644 --- a/sound/soc/sof/sof-priv.h +++ b/sound/soc/sof/sof-priv.h @@ -35,6 +35,9 @@ * on primary core */ #define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */ +#define SOF_DBG_IGNORE_D3_PERSISTENT BIT(7) /* ignore the DSP D3 persistent capability + * and always download firmware upon D3 exit + */ /* Flag definitions used for controlling the DSP dump behavior */ #define SOF_DBG_DUMP_REGS BIT(0)